diff mbox series

[AVX512] : Fix cvtusi2<ssescalarmodesuffix>64<round_name> insn mnemonic

Message ID CAFULd4Z2Se+KmiUWf9=DsiDeQ0ST1BXSNkw70BD-TWrx7A0BXQ@mail.gmail.com
State New
Headers show
Series [AVX512] : Fix cvtusi2<ssescalarmodesuffix>64<round_name> insn mnemonic | expand

Commit Message

Uros Bizjak May 23, 2018, 10:08 a.m. UTC
Hello!

With current insn mnemonic and ATT assembler dialect, there is no way
for the assembler to distinguish between DImode and SImode instruction
when memory input operand is used. The dump for 32bit memory reads as:

   0:   62 f1 7e 08 7b 05 00    vcvtusi2ss 0x0(%rip),%xmm0,%xmm0
   7:   00 00 00
  10:   62 f1 7f 08 7b 05 00    vcvtusi2sd 0x0(%rip),%xmm0,%xmm0
  17:   00 00 00

And for 64bit access:

  20:   62 f1 fe 08 7b 05 00    vcvtusi2ss 0x0(%rip),%xmm0,%xmm0
  27:   00 00 00
  30:   62 f1 ff 08 7b 05 00    vcvtusi2sd 0x0(%rip),%xmm0,%xmm0
  37:   00 00 00

 (Note the difference in the 3rd byte. On a related note, binutils
should also be fixed to dump vcvtsi2sdq in the 64bit case to avoid
ambiguity)

We should use "q" suffix with the ATT dialect in the Dimode insn mnemonic.

2018-05-23  Uros Bizjak  <ubizjak@gmail.com>

    * config/i386/sse.md (cvtusi2<ssescalarmodesuffix>64<round_name>):
    Add {q} suffix to insn mnemonic.

    testsuite/Changelog:

2018-05-23  Uros Bizjak  <ubizjak@gmail.com>

    * gcc.target/i386/avx512f-vcvtusi2sd64-1.c: Update scan string.
    * gcc.target/i386/avx512f-vcvtusi2ss64-1.c: Ditto.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

OK for mainline and backports?

Uros.

Comments

Jeff Law May 24, 2018, 9:13 p.m. UTC | #1
On 05/23/2018 04:08 AM, Uros Bizjak wrote:
> Hello!
> 
> With current insn mnemonic and ATT assembler dialect, there is no way
> for the assembler to distinguish between DImode and SImode instruction
> when memory input operand is used. The dump for 32bit memory reads as:
> 
>    0:   62 f1 7e 08 7b 05 00    vcvtusi2ss 0x0(%rip),%xmm0,%xmm0
>    7:   00 00 00
>   10:   62 f1 7f 08 7b 05 00    vcvtusi2sd 0x0(%rip),%xmm0,%xmm0
>   17:   00 00 00
> 
> And for 64bit access:
> 
>   20:   62 f1 fe 08 7b 05 00    vcvtusi2ss 0x0(%rip),%xmm0,%xmm0
>   27:   00 00 00
>   30:   62 f1 ff 08 7b 05 00    vcvtusi2sd 0x0(%rip),%xmm0,%xmm0
>   37:   00 00 00
> 
>  (Note the difference in the 3rd byte. On a related note, binutils
> should also be fixed to dump vcvtsi2sdq in the 64bit case to avoid
> ambiguity)
> 
> We should use "q" suffix with the ATT dialect in the Dimode insn mnemonic.
> 
> 2018-05-23  Uros Bizjak  <ubizjak@gmail.com>
> 
>     * config/i386/sse.md (cvtusi2<ssescalarmodesuffix>64<round_name>):
>     Add {q} suffix to insn mnemonic.
> 
>     testsuite/Changelog:
> 
> 2018-05-23  Uros Bizjak  <ubizjak@gmail.com>
> 
>     * gcc.target/i386/avx512f-vcvtusi2sd64-1.c: Update scan string.
>     * gcc.target/i386/avx512f-vcvtusi2ss64-1.c: Ditto.
> 
> Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
> 
> OK for mainline and backports?
OK.
jeff
diff mbox series

Patch

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 8a80fa35067..30411b15493 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -4463,7 +4463,7 @@ 
 	  (match_operand:VF_128 1 "register_operand" "v")
 	  (const_int 1)))]
   "TARGET_AVX512F && TARGET_64BIT"
-  "vcvtusi2<ssescalarmodesuffix>\t{%2, <round_op3>%1, %0|%0, %1<round_op3>, %2}"
+  "vcvtusi2<ssescalarmodesuffix>{q}\t{%2, <round_op3>%1, %0|%0, %1<round_op3>, %2}"
   [(set_attr "type" "sseicvt")
    (set_attr "prefix" "evex")
    (set_attr "mode" "<ssescalarmode>")])
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd64-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd64-1.c
index 8675450f0c4..66476c3013f 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd64-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd64-1.c
@@ -1,7 +1,7 @@ 
 /* { dg-do compile { target { ! ia32 } } } */
 /* { dg-options "-mavx512f -O2" } */
-/* { dg-final { scan-assembler-times "vcvtusi2sd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtusi2sd\[ \\t\]+\[^%\n\]*%r\[^\{\n\]*\{ru-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtusi2sdq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtusi2sdq\[ \\t\]+\[^%\n\]*%r\[^\{\n\]*\{ru-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
 
 #include <immintrin.h>
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss64-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss64-1.c
index 38ecf39ad65..f4dae536873 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss64-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss64-1.c
@@ -1,7 +1,7 @@ 
 /* { dg-do compile { target { ! ia32 } } } */
 /* { dg-options "-mavx512f -O2" } */
-/* { dg-final { scan-assembler-times "vcvtusi2ss\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtusi2ss\[ \\t\]+\[^%\n\]*%r\[^\{\n\]*\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtusi2ssq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtusi2ssq\[ \\t\]+\[^%\n\]*%r\[^\{\n\]*\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
 
 #include <immintrin.h>