Patchwork [U-Boot,v2,3/4] Initialize second PHY on OpenRD-Client and OpenRD-Ultimate

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Submitter Clint Adams
Date April 18, 2011, 11:47 p.m.
Message ID <1303170450-4230-4-git-send-email-clint@debian.org>
Download mbox | patch
Permalink /patch/91893/
State Superseded
Headers show

Comments

Clint Adams - April 18, 2011, 11:47 p.m.
(rework of Julian Pidancet's patch)
---
 board/Marvell/openrd/openrd.c |   25 +++++++++++++++++++++----
 include/configs/openrd.h      |   14 ++++++++++++--
 2 files changed, 33 insertions(+), 6 deletions(-)
Prafulla Wadaskar - April 19, 2011, 4:24 a.m.
> -----Original Message-----
> From: Clint Adams [mailto:clint@debian.org]
> Sent: Tuesday, April 19, 2011 5:17 AM
> To: u-boot@lists.denx.de
> Cc: Albert ARIBAUD; Prafulla Wadaskar; julian.pidancet@citrix.com;
> Wolfgang Denk; Clint Adams
> Subject: [PATCH v2 3/4] Initialize second PHY on OpenRD-Client and
> OpenRD-Ultimate
> 
> (rework of Julian Pidancet's patch)

Hi Clint

Some meaning full description about this patch is useful to understand objective of this patch. It is very difficult to know which patch you are referring here. At least pointers are expected.
 
> ---

You must have captured change log history here.
That is equally important too.
Please refer "Sending updated patch versions" @ http://denx.de/wiki/U-Boot/Patches

Regards..
Prafulla . .

>  board/Marvell/openrd/openrd.c |   25 +++++++++++++++++++++----
>  include/configs/openrd.h      |   14 ++++++++++++--
>  2 files changed, 33 insertions(+), 6 deletions(-)
> 
> diff --git a/board/Marvell/openrd/openrd.c
> b/board/Marvell/openrd/openrd.c
> index 14ca88e..b2f7adb 100644
> --- a/board/Marvell/openrd/openrd.c
> +++ b/board/Marvell/openrd/openrd.c
> @@ -124,12 +124,11 @@ int board_init(void)
>  }
> 
>  #ifdef CONFIG_RESET_PHY_R
> -/* Configure and enable MV88E1116 PHY */
> -void reset_phy(void)
> +/* Configure and enable MV88E1116/88E1121 PHY */
> +void mv_phy_init(char *name)
>  {
>  	u16 reg;
>  	u16 devadr;
> -	char *name = "egiga0";
> 
>  	if (miiphy_set_current_dev(name))
>  		return;
> @@ -154,6 +153,24 @@ void reset_phy(void)
>  	/* reset the phy */
>  	miiphy_reset(name, devadr);
> 
> -	printf("88E1116 Initialized on %s\n", name);
> +	printf(PHY_NO" Initialized on %s\n", name);
> +}
> +
> +void reset_phy(void)
> +{
> +       mv_phy_init("egiga0");
> +
> +#ifdef CONFIG_BOARD_IS_OPENRD_CLIENT
> +       /* Kirkwood ethernet driver is written with the assumption that
> in case
> +        * of multiple PHYs, their addresses are consecutive. But
> unfortunately
> +        * in case of OpenRD-Client, PHY addresses are not
> consecutive.*/
> +       miiphy_write("egiga1", 0xEE, 0xEE, 24);
> +#endif
> +
> +#if defined(CONFIG_BOARD_IS_OPENRD_CLIENT) || \
> +    defined(CONFIG_BOARD_IS_OPENRD_ULTIMATE)
> +       /* configure and initialize both PHY's */
> +       mv_phy_init("egiga1");
> +#endif
>  }
>  #endif /* CONFIG_RESET_PHY_R */
> diff --git a/include/configs/openrd.h b/include/configs/openrd.h
> index 7299749..8d86067 100644
> --- a/include/configs/openrd.h
> +++ b/include/configs/openrd.h
> @@ -117,8 +117,18 @@
>   * Ethernet Driver configuration
>   */
>  #ifdef CONFIG_CMD_NET
> -#define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
> -#define CONFIG_PHY_BASE_ADR	0x8
> +# ifdef CONFIG_BOARD_IS_OPENRD_BASE
> +#  define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
> +# else
> +#  define CONFIG_MVGBE_PORTS	{1, 1}	/* enable both ports */
> +# endif
> +# ifdef CONFIG_BOARD_IS_OPENRD_ULTIMATE
> +#  define CONFIG_PHY_BASE_ADR	0x0
> +#  define PHY_NO		"88E1121"
> +# else
> +#  define CONFIG_PHY_BASE_ADR	0x8
> +#  define PHY_NO		"88E1116"
> +# endif
>  #endif /* CONFIG_CMD_NET */
> 
>  /*
> --
> 1.7.4.1
Wolfgang Denk - April 25, 2011, 10:14 p.m.
Dear Clint Adams,

In message <1303170450-4230-4-git-send-email-clint@debian.org> you wrote:
> (rework of Julian Pidancet's patch)
> ---
>  board/Marvell/openrd/openrd.c |   25 +++++++++++++++++++++----
>  include/configs/openrd.h      |   14 ++++++++++++--
>  2 files changed, 33 insertions(+), 6 deletions(-)

This is actually the patch with the Coding Style issues.  And it has no
Signed-off-by: line either.

NAK.

Best regards,

Wolfgang Denk

Patch

diff --git a/board/Marvell/openrd/openrd.c b/board/Marvell/openrd/openrd.c
index 14ca88e..b2f7adb 100644
--- a/board/Marvell/openrd/openrd.c
+++ b/board/Marvell/openrd/openrd.c
@@ -124,12 +124,11 @@  int board_init(void)
 }
 
 #ifdef CONFIG_RESET_PHY_R
-/* Configure and enable MV88E1116 PHY */
-void reset_phy(void)
+/* Configure and enable MV88E1116/88E1121 PHY */
+void mv_phy_init(char *name)
 {
 	u16 reg;
 	u16 devadr;
-	char *name = "egiga0";
 
 	if (miiphy_set_current_dev(name))
 		return;
@@ -154,6 +153,24 @@  void reset_phy(void)
 	/* reset the phy */
 	miiphy_reset(name, devadr);
 
-	printf("88E1116 Initialized on %s\n", name);
+	printf(PHY_NO" Initialized on %s\n", name);
+}
+
+void reset_phy(void)
+{
+       mv_phy_init("egiga0");
+
+#ifdef CONFIG_BOARD_IS_OPENRD_CLIENT
+       /* Kirkwood ethernet driver is written with the assumption that in case
+        * of multiple PHYs, their addresses are consecutive. But unfortunately
+        * in case of OpenRD-Client, PHY addresses are not consecutive.*/
+       miiphy_write("egiga1", 0xEE, 0xEE, 24);
+#endif
+
+#if defined(CONFIG_BOARD_IS_OPENRD_CLIENT) || \
+    defined(CONFIG_BOARD_IS_OPENRD_ULTIMATE)
+       /* configure and initialize both PHY's */
+       mv_phy_init("egiga1");
+#endif
 }
 #endif /* CONFIG_RESET_PHY_R */
diff --git a/include/configs/openrd.h b/include/configs/openrd.h
index 7299749..8d86067 100644
--- a/include/configs/openrd.h
+++ b/include/configs/openrd.h
@@ -117,8 +117,18 @@ 
  * Ethernet Driver configuration
  */
 #ifdef CONFIG_CMD_NET
-#define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
-#define CONFIG_PHY_BASE_ADR	0x8
+# ifdef CONFIG_BOARD_IS_OPENRD_BASE
+#  define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
+# else
+#  define CONFIG_MVGBE_PORTS	{1, 1}	/* enable both ports */
+# endif
+# ifdef CONFIG_BOARD_IS_OPENRD_ULTIMATE
+#  define CONFIG_PHY_BASE_ADR	0x0
+#  define PHY_NO		"88E1121"
+# else
+#  define CONFIG_PHY_BASE_ADR	0x8
+#  define PHY_NO		"88E1116"
+# endif
 #endif /* CONFIG_CMD_NET */
 
 /*