From patchwork Tue May 22 17:05:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ray Jui X-Patchwork-Id: 918463 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=broadcom.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=broadcom.com header.i=@broadcom.com header.b="Pp7SJz3F"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40r28t4F3Yz9s19 for ; Wed, 23 May 2018 03:05:50 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751655AbeEVRFf (ORCPT ); Tue, 22 May 2018 13:05:35 -0400 Received: from mail-qk0-f194.google.com ([209.85.220.194]:41607 "EHLO mail-qk0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751432AbeEVRFb (ORCPT ); Tue, 22 May 2018 13:05:31 -0400 Received: by mail-qk0-f194.google.com with SMTP id d125-v6so15149064qkb.8 for ; Tue, 22 May 2018 10:05:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=21bnduVgcDwu9l0VNSli21aY75l5IbAbWxaIsvVQ02w=; b=Pp7SJz3FuarqkmQSHoFUDz6QG6NBqeVJtZG98SFM4KEqSPkdtA1EOiBRCkHM7ftMSx EO2MLO8/7BQGibs3+/ukSAIHnoThVHpdfbec6BG2H/W90+o/jcrcWXJf5m+sz+AFeMkC xDtLovMFwoc03g918bPbzn4WmfjdnjYBGekpc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=21bnduVgcDwu9l0VNSli21aY75l5IbAbWxaIsvVQ02w=; b=p/3xRb88UlysiEyFFz+vO/PsVyUaBjMi35Fli0gw29pCv2U7K3SFtqOjuJRsXvoNiv 4/JQ0u5BK8HRpkNZwHKK0hslUDRr7gMYp3wqWvi9BSe4twCgVj+kNKEAfcK7VPMwoowk CgCLEpAGtGtPWpw4v3N8K9xGeRRLQaDocV9OQ7bMm78bO9BpcCbIKbnG0e2SQLfGeV+o 31U8aJRPG9Lsux8CR35zMFzlt6NaYLMrp76gRQSHZqXAi5mMWW+hSOegxYnRD55JSn9Q WteLMgzRdWngpGf+XMdAUDfNglxhlpcE4LpAvCRwib6Sy6xdPjOac9ey9MN4ZuaNLCMF rAfA== X-Gm-Message-State: ALKqPwc3+7dN4G8cnoVpF4C4OiqthdNk/CqcD0KpKJsEnnqt5MH8VLuH Ktocbz9gdsM2jNkm3GvaajRuaQ== X-Google-Smtp-Source: AB8JxZo05HygYZYE+wLCN8uV9zwaZPa1max+HkXtdviehK6Y35ULet1SvwTWoKS8toJxo2rKluAeMQ== X-Received: by 2002:a37:64cf:: with SMTP id y198-v6mr11114075qkb.279.1527008730587; Tue, 22 May 2018 10:05:30 -0700 (PDT) Received: from lbrmn-lnxub44-1.ric.broadcom.com ([192.19.228.250]) by smtp.gmail.com with ESMTPSA id w12-v6sm13336301qtb.80.2018.05.22.10.05.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 22 May 2018 10:05:29 -0700 (PDT) From: Ray Jui To: Lorenzo Pieralisi , Bjorn Helgaas Cc: Bjorn Helgaas , linux-kernel@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, linux-pci@vger.kernel.org, Ray Jui Subject: [PATCH 2/2] PCI: iproc: Reduce inbound/outbound mapping print level Date: Tue, 22 May 2018 10:05:09 -0700 Message-Id: <1527008709-20786-3-git-send-email-ray.jui@broadcom.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1527008709-20786-1-git-send-email-ray.jui@broadcom.com> References: <1527008709-20786-1-git-send-email-ray.jui@broadcom.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Reduce inbound/outbound mapping print level from dev_info to dev_dbg. This reduces the console logs during Linux boot process Signed-off-by: Ray Jui Reviewed-by: Scott Branden --- drivers/pci/host/pcie-iproc.c | 34 +++++++++++++++++----------------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/pci/host/pcie-iproc.c b/drivers/pci/host/pcie-iproc.c index b1d8c60..14f374d 100644 --- a/drivers/pci/host/pcie-iproc.c +++ b/drivers/pci/host/pcie-iproc.c @@ -827,14 +827,14 @@ static inline int iproc_pcie_ob_write(struct iproc_pcie *pcie, int window_idx, writel(lower_32_bits(pci_addr), pcie->base + omap_offset); writel(upper_32_bits(pci_addr), pcie->base + omap_offset + 4); - dev_info(dev, "ob window [%d]: offset 0x%x axi %pap pci %pap\n", - window_idx, oarr_offset, &axi_addr, &pci_addr); - dev_info(dev, "oarr lo 0x%x oarr hi 0x%x\n", - readl(pcie->base + oarr_offset), - readl(pcie->base + oarr_offset + 4)); - dev_info(dev, "omap lo 0x%x omap hi 0x%x\n", - readl(pcie->base + omap_offset), - readl(pcie->base + omap_offset + 4)); + dev_dbg(dev, "ob window [%d]: offset 0x%x axi %pap pci %pap\n", + window_idx, oarr_offset, &axi_addr, &pci_addr); + dev_dbg(dev, "oarr lo 0x%x oarr hi 0x%x\n", + readl(pcie->base + oarr_offset), + readl(pcie->base + oarr_offset + 4)); + dev_dbg(dev, "omap lo 0x%x omap hi 0x%x\n", + readl(pcie->base + omap_offset), + readl(pcie->base + omap_offset + 4)); return 0; } @@ -1001,8 +1001,8 @@ static int iproc_pcie_ib_write(struct iproc_pcie *pcie, int region_idx, iproc_pcie_reg_is_invalid(imap_offset)) return -EINVAL; - dev_info(dev, "ib region [%d]: offset 0x%x axi %pap pci %pap\n", - region_idx, iarr_offset, &axi_addr, &pci_addr); + dev_dbg(dev, "ib region [%d]: offset 0x%x axi %pap pci %pap\n", + region_idx, iarr_offset, &axi_addr, &pci_addr); /* * Program the IARR registers. The upper 32-bit IARR register is @@ -1012,9 +1012,9 @@ static int iproc_pcie_ib_write(struct iproc_pcie *pcie, int region_idx, pcie->base + iarr_offset); writel(upper_32_bits(pci_addr), pcie->base + iarr_offset + 4); - dev_info(dev, "iarr lo 0x%x iarr hi 0x%x\n", - readl(pcie->base + iarr_offset), - readl(pcie->base + iarr_offset + 4)); + dev_dbg(dev, "iarr lo 0x%x iarr hi 0x%x\n", + readl(pcie->base + iarr_offset), + readl(pcie->base + iarr_offset + 4)); /* * Now program the IMAP registers. Each IARR region may have one or @@ -1028,10 +1028,10 @@ static int iproc_pcie_ib_write(struct iproc_pcie *pcie, int region_idx, writel(upper_32_bits(axi_addr), pcie->base + imap_offset + ib_map->imap_addr_offset); - dev_info(dev, "imap window [%d] lo 0x%x hi 0x%x\n", - window_idx, readl(pcie->base + imap_offset), - readl(pcie->base + imap_offset + - ib_map->imap_addr_offset)); + dev_dbg(dev, "imap window [%d] lo 0x%x hi 0x%x\n", + window_idx, readl(pcie->base + imap_offset), + readl(pcie->base + imap_offset + + ib_map->imap_addr_offset)); imap_offset += ib_map->imap_window_offset; axi_addr += size;