Patchwork [SPARC] Hookize REGISTER_MOVE_COST

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Submitter Anatoly Sokolov
Date April 17, 2011, 7:41 p.m.
Message ID <334929894.20110417234150@post.ru>
Download mbox | patch
Permalink /patch/91582/
State New
Headers show

Comments

Anatoly Sokolov - April 17, 2011, 7:41 p.m.
Hello.

  This patch removes obsolete REGISTER_MOVE_COST macro from SPARC back end in 
the GCC and introduces equivalent TARGET_REGISTER_MOVE_COST target hooks.

   Bootstrapped and regression tested on sparc64-unknown-linux-gnu.

  OK to install?

        * config/sparc/sparc.h (GENERAL_OR_I64, REGISTER_MOVE_COST): Remove.
        * config/sparc/sparc.c (TARGET_REGISTER_MOVE_COST): Define.
        (general_or_i64_p, sparc_register_move_cost): New function.



Anatoly.
Eric Botcazou - April 17, 2011, 10:43 p.m.
>         * config/sparc/sparc.h (GENERAL_OR_I64, REGISTER_MOVE_COST):
> Remove. * config/sparc/sparc.c (TARGET_REGISTER_MOVE_COST): Define.
> (general_or_i64_p, sparc_register_move_cost): New function.

OK modulo:

> @@ -9124,6 +9128,36 @@
>      }
>  }
>
> +static inline bool
> +general_or_i64_p (reg_class_t rclass)
> +{
> +  return (rclass == GENERAL_REGS || rclass == I64_REGS);
> +}

Missing "/* Return true if CLASS is either GENERAL_REGS or I64_REGS.  */"

> +/* Implement TARGET_REGISTER_MOVE_COST.  */
> +
> +static int
> +sparc_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED,
> +                         reg_class_t from, reg_class_t to)
> +{
> +  if ((FP_REG_CLASS_P (from) && general_or_i64_p (to))
> +      || (general_or_i64_p (from) && FP_REG_CLASS_P (to))
> +      || from == FPCC_REGS
> +      || to == FPCC_REGS)
> +    {
> +      if (sparc_cpu == PROCESSOR_ULTRASPARC
> +         || sparc_cpu == PROCESSOR_ULTRASPARC3
> +         || sparc_cpu == PROCESSOR_NIAGARA
> +         || sparc_cpu == PROCESSOR_NIAGARA2)
> +       return 12;
> +      else
> +       return 6;
> +    }
> +
> +  return 2;
> +}

Superflous "else".  No need to retest.

Patch

Index: gcc/gcc/config/sparc/sparc.c
===================================================================
--- gcc/gcc/config/sparc/sparc.c        (revision 172245)
+++ gcc/gcc/config/sparc/sparc.c        (working copy)
@@ -422,6 +422,8 @@ 
 static rtx sparc_tls_got (void);
 static const char *get_some_local_dynamic_name (void);
 static int get_some_local_dynamic_name_1 (rtx *, void *);
+static int sparc_register_move_cost (enum machine_mode,
+                                    reg_class_t, reg_class_t);
 static bool sparc_rtx_costs (rtx, int, int, int *, bool);
 static rtx sparc_function_value (const_tree, const_tree, bool);
 static rtx sparc_libcall_value (enum machine_mode, const_rtx);
@@ -560,6 +562,8 @@ 
 #define TARGET_RTX_COSTS sparc_rtx_costs
 #undef TARGET_ADDRESS_COST
 #define TARGET_ADDRESS_COST hook_int_rtx_bool_0
+#undef TARGET_REGISTER_MOVE_COST
+#define TARGET_REGISTER_MOVE_COST sparc_register_move_cost
 
 #undef TARGET_PROMOTE_FUNCTION_MODE
 #define TARGET_PROMOTE_FUNCTION_MODE sparc_promote_function_mode
@@ -9124,6 +9128,36 @@ 
     }
 }
 
+static inline bool
+general_or_i64_p (reg_class_t rclass)
+{
+  return (rclass == GENERAL_REGS || rclass == I64_REGS);
+}
+
+/* Implement TARGET_REGISTER_MOVE_COST.  */
+
+static int
+sparc_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED,
+                         reg_class_t from, reg_class_t to)
+{
+  if ((FP_REG_CLASS_P (from) && general_or_i64_p (to))
+      || (general_or_i64_p (from) && FP_REG_CLASS_P (to))
+      || from == FPCC_REGS
+      || to == FPCC_REGS)  
+    {
+      if (sparc_cpu == PROCESSOR_ULTRASPARC
+         || sparc_cpu == PROCESSOR_ULTRASPARC3
+         || sparc_cpu == PROCESSOR_NIAGARA
+         || sparc_cpu == PROCESSOR_NIAGARA2)
+       return 12;
+      else
+       return 6;
+    }
+
+  return 2;
+}
+
+
 /* Emit the sequence of insns SEQ while preserving the registers REG and REG2.
    This is achieved by means of a manual dynamic stack space allocation in
    the current frame.  We make the assumption that SEQ doesn't contain any
Index: gcc/gcc/config/sparc/sparc.h
===================================================================
--- gcc/gcc/config/sparc/sparc.h        (revision 172245)
+++ gcc/gcc/config/sparc/sparc.h        (working copy)
@@ -1715,18 +1715,6 @@ 
 #define DITF_CONVERSION_LIBFUNCS       0
 #define SUN_INTEGER_MULTIPLY_64        0
 
-/* Compute extra cost of moving data between one register class
-   and another.  */
-#define GENERAL_OR_I64(C) ((C) == GENERAL_REGS || (C) == I64_REGS)
-#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2)               \
-  (((FP_REG_CLASS_P (CLASS1) && GENERAL_OR_I64 (CLASS2)) \
-    || (GENERAL_OR_I64 (CLASS1) && FP_REG_CLASS_P (CLASS2)) \
-    || (CLASS1) == FPCC_REGS || (CLASS2) == FPCC_REGS)         \
-   ? ((sparc_cpu == PROCESSOR_ULTRASPARC \
-       || sparc_cpu == PROCESSOR_ULTRASPARC3 \
-       || sparc_cpu == PROCESSOR_NIAGARA \
-       || sparc_cpu == PROCESSOR_NIAGARA2) ? 12 : 6) : 2)
-
 /* Provide the cost of a branch.  For pre-v9 processors we use
    a value of 3 to take into account the potential annulling of
    the delay slot (which ends up being a bubble in the pipeline slot)