From patchwork Tue May 15 15:51:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 913772 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="h4mn5x8Y"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40lhs40Zd6z9s0x for ; Wed, 16 May 2018 01:52:08 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754279AbeEOPvJ (ORCPT ); Tue, 15 May 2018 11:51:09 -0400 Received: from mail-yb0-f195.google.com ([209.85.213.195]:42586 "EHLO mail-yb0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754276AbeEOPvI (ORCPT ); Tue, 15 May 2018 11:51:08 -0400 Received: by mail-yb0-f195.google.com with SMTP id 140-v6so213139ybc.9; Tue, 15 May 2018 08:51:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tAo7rXu+mux3L7ze8r9gzOGceOAVFwQmVWVRQkyRRgw=; b=h4mn5x8YYkR4E/GOjWgwqntmch0dvHvbZ4ZSNh/BH8QbemmmzuWaaPmiYyYd3rUye9 /fHOsseRA6GGSZWZgBmTbzP1vpeQ7VtPYtGRi9pkuSe9i6Ul0uzg5/J2qcKQDuOxngf5 yHxOxGodqeYVMl/llttEWEF7lQ+Jo0L60CApGzZQuVcyBJLaFbeuvqV5Vm4pP/px2Dm8 TW+TYMEkY1C1q2DrkT+CRGkjB/DuqlBXVSAUqawLpoZ81H+m+GHOjQfY2Dj57aqUGLAI uY/lN+QVZTXJJ0/Ny4ckPmtfGUZYjNWptkcG6gqQ0QTPOzzHOM+/I1MwcSAHa1RbAYNp 4/mg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=tAo7rXu+mux3L7ze8r9gzOGceOAVFwQmVWVRQkyRRgw=; b=DzpN/U69867IgwlttZ9EETy2dqXshG1BvEPEoBbwWXwaOTa/MuB9XwqvsnExA6Nw7x n5x6iVYrrXBtwztSVVSS3188BpsNVmhKG9SHN6FssogYWrwwunBJl2oMlmrbasVt1jjn Q91lChpEcrOhNzUf896qdKrjPJp2DVqQDDQTyyIn9R06LoavLFqdbn2tpI7tzGJrx+6d pbxgUdLjjUmdI4DN0Zf1B8UJKl0R/7k1l41Yefi9NKYZSILd4MYIlRrcneFHUhDjxprz 4LonP1qaKCIQQXwF0krgfS26zuheR8Q41v1dc32vIJO9DKV7DXFN0QEupUWplweAXhJm c/BQ== X-Gm-Message-State: ALKqPwflDLeI2gNmOqKtRvGBcWsBRY4Gt5IrE4PumQ/FOtX6GU568mR9 P1RH6g2XKAuwPBTmAe1Yckw= X-Google-Smtp-Source: AB8JxZp0GtDPBZBzjkEmhHchVzZOOHq/i5T6Sa67febjzJgeFR/etLaWqVfPOQsCwq+IgajG/Srmdg== X-Received: by 2002:a25:6648:: with SMTP id z8-v6mr6329849ybm.108.1526399467235; Tue, 15 May 2018 08:51:07 -0700 (PDT) Received: from localhost ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id b188-v6sm132960ywc.72.2018.05.15.08.51.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 15 May 2018 08:51:06 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v3 6/8] gpio: ws16c48: Utilize for_each_set_clump macro Date: Tue, 15 May 2018 11:51:01 -0400 Message-Id: X-Mailer: git-send-email 2.17.0 In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump macro to simplify code and improve clarity. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-ws16c48.c | 66 +++++++++---------------------------- 1 file changed, 16 insertions(+), 50 deletions(-) diff --git a/drivers/gpio/gpio-ws16c48.c b/drivers/gpio/gpio-ws16c48.c index c7028eb0b8e1..625336376b5d 100644 --- a/drivers/gpio/gpio-ws16c48.c +++ b/drivers/gpio/gpio-ws16c48.c @@ -134,42 +134,19 @@ static int ws16c48_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); - const unsigned int gpio_reg_size = 8; - size_t i; - const size_t num_ports = chip->ngpio / gpio_reg_size; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); + size_t port; + size_t word; + unsigned int offset; + const unsigned int port_size = 8; + const size_t num_ports = chip->ngpio / port_size; unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < num_ports; i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - - /* read bits from current gpio port */ - port_state = inb(ws16c48gpio->base + i); - - /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + for_each_set_clump(port, word, offset, mask, num_ports, port_size) { + port_state = inb(ws16c48gpio->base + port); + bits[word] |= port_state << offset; } return 0; @@ -203,26 +180,19 @@ static void ws16c48_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); - unsigned int i; - const unsigned int gpio_reg_size = 8; - unsigned int port; + size_t port; + size_t word; + unsigned int offset; + const unsigned int port_size = 8; + const size_t num_ports = chip->ngpio / port_size; unsigned int iomask; unsigned int bitmask; unsigned long flags; - /* set bits are evaluated a gpio register size at a time */ - for (i = 0; i < chip->ngpio; i += gpio_reg_size) { - /* no more set bits in this mask word; skip to the next word */ - if (!mask[BIT_WORD(i)]) { - i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size; - continue; - } - - port = i / gpio_reg_size; - + for_each_set_clump(port, word, offset, mask, num_ports, port_size) { /* mask out GPIO configured for input */ - iomask = mask[BIT_WORD(i)] & ~ws16c48gpio->io_state[port]; - bitmask = iomask & bits[BIT_WORD(i)]; + iomask = (mask[word] >> offset) & ~ws16c48gpio->io_state[port]; + bitmask = iomask & (bits[word] >> offset); raw_spin_lock_irqsave(&ws16c48gpio->lock, flags); @@ -232,10 +202,6 @@ static void ws16c48_gpio_set_multiple(struct gpio_chip *chip, outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port); raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags); - - /* prepare for next gpio register set */ - mask[BIT_WORD(i)] >>= gpio_reg_size; - bits[BIT_WORD(i)] >>= gpio_reg_size; } }