From patchwork Tue May 15 15:51:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 913771 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="mr0UbEHR"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40lhs00klCz9s08 for ; Wed, 16 May 2018 01:52:04 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754306AbeEOPvT (ORCPT ); Tue, 15 May 2018 11:51:19 -0400 Received: from mail-yw0-f196.google.com ([209.85.161.196]:40580 "EHLO mail-yw0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754302AbeEOPvS (ORCPT ); Tue, 15 May 2018 11:51:18 -0400 Received: by mail-yw0-f196.google.com with SMTP id p144-v6so204936ywg.7; Tue, 15 May 2018 08:51:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=4t9I9klQQ8DpB7w8AbzTMPlX1P6Su0J5LCLKig5N73k=; b=mr0UbEHRPHuyZxe25QYgo9kl71RIkU/sguj412RqhthF1ace69sXbBpDP8dUZ0XPhW jUDJcUCjwFcih1Hu0RpT9AjydRzof6J8LZdCPtd0b1v9UYDkxPYejnOXLQgjXAEl/Glw oSTyZ89XVoaImiG2Ab90rbdT4uE33MZe9281j6UMkzhyIWaEo8tf59YROHYfCsufmXDZ I364NGN3PYJt4Xk+wmG/mmNP6X4F+LvyNLwdJN0ErYTUKM45jX8m0T+nkxSJ6SoogoIy Tld5hBtyvqok5E7GAKkkpIN+QKvgo0qCOslpkGHqKGTZOM/jeriD7kZAK9IJMkzpMBzW PTWQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=4t9I9klQQ8DpB7w8AbzTMPlX1P6Su0J5LCLKig5N73k=; b=W8UxT7cqBoHjpLxlUFI6xoYcJxwn2t5heW8cPFmu2tieFSNkQ+BLzMnbeZ2dVcfdJA aXfN8Uqm5fyK657DrS+3O0ZCN1nrb8QHOOkTkW/kOW6PYOflgY1VFi8giKiaV9qySnHj MmxJ1CR1zbDXC0ow9Li+6sK9t2P/2+EJ1ucLTnGptMPyLrEEh0h5qrpwd0tzcgVjCz7A P5YlGPcwYRe737dd/3YU8cUKc0TZr3tgdOEbqI3efAFjmz3MSit6IOiZuXshHaqWxwYi h7ibaB3IWQYzdgtGILmOjis8tmLAop9Or94Tt0woJJJEih1tc7+L21sRRuxBXxCsAz17 Fy+A== X-Gm-Message-State: ALKqPwfiSVYvgRCorUX5YuwJHGoxqi5JxR64Lek5ojKK976B4p9M5Brg rQQ9ioEsBaSAymoLpWiQOeU= X-Google-Smtp-Source: AB8JxZqDh97A1/UKiuGIL5A0xm+VhhBrodntLca9AEuzcOL7lMTnGxYezMrtMPV0HdkI/+TAPCaUiw== X-Received: by 2002:a0d:f1c2:: with SMTP id a185-v6mr6557727ywf.460.1526399477380; Tue, 15 May 2018 08:51:17 -0700 (PDT) Received: from localhost ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id c205-v6sm129402ywb.42.2018.05.15.08.51.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 15 May 2018 08:51:17 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v3 7/8] gpio: pci-idio-16: Utilize for_each_set_clump macro Date: Tue, 15 May 2018 11:51:11 -0400 Message-Id: <7920f597375e1ae5dc70bd9f6eedb23797e4a119.1526397764.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump macro to simplify code and improve clarity. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-pci-idio-16.c | 67 +++++++++++---------------------- 1 file changed, 21 insertions(+), 46 deletions(-) diff --git a/drivers/gpio/gpio-pci-idio-16.c b/drivers/gpio/gpio-pci-idio-16.c index 25d16b2af1c3..6d748c6e59cb 100644 --- a/drivers/gpio/gpio-pci-idio-16.c +++ b/drivers/gpio/gpio-pci-idio-16.c @@ -109,44 +109,20 @@ static int idio_16_gpio_get_multiple(struct gpio_chip *chip, { struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); size_t i; - const unsigned int gpio_reg_size = 8; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); - unsigned long port_state; + size_t word; + unsigned int offset; void __iomem *ports[] = { &idio16gpio->reg->out0_7, &idio16gpio->reg->out8_15, &idio16gpio->reg->in0_7, &idio16gpio->reg->in8_15, }; + unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports); i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - - /* read bits from current gpio port */ + for_each_set_clump(i, word, offset, mask, ARRAY_SIZE(ports), 8) { port_state = ioread8(ports[i]); - - /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + bits[word] |= port_state << offset; } return 0; @@ -186,30 +162,29 @@ static void idio_16_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); + size_t i; + size_t word; + unsigned int offset; + void __iomem *ports[] = { + &idio16gpio->reg->out0_7, &idio16gpio->reg->out8_15, + }; + unsigned int iomask; + unsigned int bitmask; unsigned long flags; unsigned int out_state; - raw_spin_lock_irqsave(&idio16gpio->lock, flags); + for_each_set_clump(i, word, offset, mask, ARRAY_SIZE(ports), 8) { + iomask = mask[word] >> offset; + bitmask = iomask & (bits[word] >> offset); - /* process output lines 0-7 */ - if (*mask & 0xFF) { - out_state = ioread8(&idio16gpio->reg->out0_7) & ~*mask; - out_state |= *mask & *bits; - iowrite8(out_state, &idio16gpio->reg->out0_7); - } + raw_spin_lock_irqsave(&idio16gpio->lock, flags); - /* shift to next output line word */ - *mask >>= 8; + out_state = ioread8(ports[i]) & ~iomask; + out_state |= bitmask; + iowrite8(out_state, ports[i]); - /* process output lines 8-15 */ - if (*mask & 0xFF) { - *bits >>= 8; - out_state = ioread8(&idio16gpio->reg->out8_15) & ~*mask; - out_state |= *mask & *bits; - iowrite8(out_state, &idio16gpio->reg->out8_15); + raw_spin_unlock_irqrestore(&idio16gpio->lock, flags); } - - raw_spin_unlock_irqrestore(&idio16gpio->lock, flags); } static void idio_16_irq_ack(struct irq_data *data)