From patchwork Tue May 15 15:51:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 913770 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="vSm4LHDK"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40lhrp6XPsz9s02 for ; Wed, 16 May 2018 01:51:54 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754387AbeEOPvn (ORCPT ); Tue, 15 May 2018 11:51:43 -0400 Received: from mail-yw0-f195.google.com ([209.85.161.195]:47103 "EHLO mail-yw0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754338AbeEOPv3 (ORCPT ); Tue, 15 May 2018 11:51:29 -0400 Received: by mail-yw0-f195.google.com with SMTP id i17-v6so198135ywg.13; Tue, 15 May 2018 08:51:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=3eDCtibkXcA48k6t/AjHEMBum5bdD8G3sSUcXpNzOBs=; b=vSm4LHDKgdyqQUayk9ijpUUucx5mKupueIAiOSVYN7nhbiDa4dJjW1i8WCtxHK+lmB DN8i6LaTG+BuNPVxc2MWHqXis2tUHt7nk06Wx5XXeKrEDX0drZxKTlBw82BSIhVUYU3Y Sc34gOumRb09SvOZeQJodKXHia21NNXvrjCY57roPppycVdZtzdw5Wg7ecfuBcvmhgkl 6KSTZiyj5IE/OnfxwlysFtJWKJRy2c1lZoTPgNyad4sz3Pt9EzUZudBH4Nwuz+iNBx77 i5PNFT6u1GcOfX5rWslBxelbB/v1m8xIBWy3kzr/cSOoH80V5tMXyp8brKhsfTl7uwgG SW0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=3eDCtibkXcA48k6t/AjHEMBum5bdD8G3sSUcXpNzOBs=; b=EW3ws3zCy/0fZrXHmlfxhrQW0Yipwt77x6lVGmN9OBfYXmcoFJvEOSMKk3jAqrk0XI +ST7nIvKqxGVtJI5EIapQOvkPIAo1RMB6dxyoD0wESzy/ODyvbQNiKFRNwJ8sOLjCdto AiFvML7ibJ9qb4yBwZjS7Bt31D3cfdqxfuv+Cj2BlOWm33Cc84JLoWVNGteNw/jrxqFF jotELu57v0dVmQf5Ir14jj8eLsK+5ED77znlNXhzwUSEAZ/jcQ6AA8JP6yxBAr6MAI6c MrVYN1u3oFo1VO9GbtB64pchv9BxL2M5tWg9E7znFGGfTYvby9pbP+vsPho7j1LqIpRJ Jv+A== X-Gm-Message-State: ALKqPwdElmbtc4iWR6hplHLiN6zRKWphJKk2OdRANPlhC9TsCHOmBEte +BIRtNlYgKxIwjrGRQ8ZkLc= X-Google-Smtp-Source: AB8JxZo1HI/NOlFTnvzXYLmKMWp0tjkHGMlrkhctFWm1Iv1C8pk0x5VRyCXwHOIy6JqI5RikKdMrAA== X-Received: by 2002:a81:f00e:: with SMTP id p14-v6mr6318994ywm.277.1526399488484; Tue, 15 May 2018 08:51:28 -0700 (PDT) Received: from localhost ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id v21-v6sm119015ywc.94.2018.05.15.08.51.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 15 May 2018 08:51:28 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v3 8/8] gpio: pcie-idio-24: Utilize for_each_set_clump macro Date: Tue, 15 May 2018 11:51:22 -0400 Message-Id: <9b9004a4b7f0aba33a7deac3d400d5499153d217.1526397764.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump macro to simplify code and improve clarity. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-pcie-idio-24.c | 102 +++++++++++-------------------- 1 file changed, 36 insertions(+), 66 deletions(-) diff --git a/drivers/gpio/gpio-pcie-idio-24.c b/drivers/gpio/gpio-pcie-idio-24.c index f953541e7890..b4d300338a05 100644 --- a/drivers/gpio/gpio-pcie-idio-24.c +++ b/drivers/gpio/gpio-pcie-idio-24.c @@ -199,41 +199,21 @@ static int idio_24_gpio_get_multiple(struct gpio_chip *chip, { struct idio_24_gpio *const idio24gpio = gpiochip_get_data(chip); size_t i; - const unsigned int gpio_reg_size = 8; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); - unsigned long port_state; + size_t word; + unsigned int offset; void __iomem *ports[] = { &idio24gpio->reg->out0_7, &idio24gpio->reg->out8_15, &idio24gpio->reg->out16_23, &idio24gpio->reg->in0_7, &idio24gpio->reg->in8_15, &idio24gpio->reg->in16_23, }; + const size_t num_ports = ARRAY_SIZE(ports) + 1; + unsigned long port_state; const unsigned long out_mode_mask = BIT(1); /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports) + 1; i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - + for_each_set_clump(i, word, offset, mask, num_ports, 8) { /* read bits from current gpio port (port 6 is TTL GPIO) */ if (i < 6) port_state = ioread8(ports[i]); @@ -243,7 +223,7 @@ static int idio_24_gpio_get_multiple(struct gpio_chip *chip, port_state = ioread8(&idio24gpio->reg->ttl_in0_7); /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + bits[word] |= port_state << offset; } return 0; @@ -295,58 +275,48 @@ static void idio_24_gpio_set_multiple(struct gpio_chip *chip, { struct idio_24_gpio *const idio24gpio = gpiochip_get_data(chip); size_t i; - unsigned long bits_offset; - unsigned long gpio_mask; - const unsigned int gpio_reg_size = 8; - const unsigned long port_mask = GENMASK(gpio_reg_size, 0); - unsigned long flags; - unsigned int out_state; + size_t word; + unsigned int offset; void __iomem *ports[] = { &idio24gpio->reg->out0_7, &idio24gpio->reg->out8_15, &idio24gpio->reg->out16_23 }; + const size_t num_ports = ARRAY_SIZE(ports) + 1; + unsigned int iomask; + unsigned int bitmask; + unsigned long flags; const unsigned long out_mode_mask = BIT(1); - const unsigned int ttl_offset = 48; - const size_t ttl_i = BIT_WORD(ttl_offset); - const unsigned int word_offset = ttl_offset % BITS_PER_LONG; - const unsigned long ttl_mask = (mask[ttl_i] >> word_offset) & port_mask; - const unsigned long ttl_bits = (bits[ttl_i] >> word_offset) & ttl_mask; - - /* set bits are processed a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports); i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* check if any set bits for current port */ - gpio_mask = (*mask >> bits_offset) & port_mask; - if (!gpio_mask) { - /* no set bits for this port so move on to next port */ + unsigned int out_state; + + for_each_set_clump(i, word, offset, mask, num_ports, 8) { + iomask = mask[word] >> offset; + bitmask = iomask & (bits[word] >> offset); + + raw_spin_lock_irqsave(&idio24gpio->lock, flags); + + /* read bits from current gpio port (port 6 is TTL GPIO) */ + if (i < 6) { + out_state = ioread8(ports[i]) & ~iomask; + } else if (ioread8(&idio24gpio->reg->ctl) & out_mode_mask) { + out_state = ioread8(&idio24gpio->reg->ttl_out0_7); + } else { + /* skip TTL GPIO if set for input */ + raw_spin_unlock_irqrestore(&idio24gpio->lock, flags); continue; } - raw_spin_lock_irqsave(&idio24gpio->lock, flags); + /* set requested bit states */ + out_state &= ~iomask; + out_state |= bitmask; - /* process output lines */ - out_state = ioread8(ports[i]) & ~gpio_mask; - out_state |= (*bits >> bits_offset) & gpio_mask; - iowrite8(out_state, ports[i]); + /* write bits for current gpio port (port 6 is TTL GPIO) */ + if (i < 6) + iowrite8(out_state, ports[i]); + else + iowrite8(out_state, &idio24gpio->reg->ttl_out0_7); raw_spin_unlock_irqrestore(&idio24gpio->lock, flags); } - - /* check if setting TTL lines and if they are in output mode */ - if (!ttl_mask || !(ioread8(&idio24gpio->reg->ctl) & out_mode_mask)) - return; - - /* handle TTL output */ - raw_spin_lock_irqsave(&idio24gpio->lock, flags); - - /* process output lines */ - out_state = ioread8(&idio24gpio->reg->ttl_out0_7) & ~ttl_mask; - out_state |= ttl_bits; - iowrite8(out_state, &idio24gpio->reg->ttl_out0_7); - - raw_spin_unlock_irqrestore(&idio24gpio->lock, flags); } static void idio_24_irq_ack(struct irq_data *data)