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[U-Boot,v2,1/2] sunxi: video: HDMI: use correct bits for HSYNC and VSYNC polarity.

Message ID 20180514204953.11606-2-anarsoul@gmail.com
State Accepted
Commit c7cb17e89295312263ec7904e32a118938c72d34
Delegated to: Anatolij Gustschin
Headers show
Series video: dw_hdmi: fix HSYNC and VSYNC polarity settings | expand

Commit Message

Vasily Khoruzhick May 14, 2018, 8:49 p.m. UTC
HSYNC is bit 8, and VSYNC is bit 9.

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
 drivers/video/sunxi/sunxi_dw_hdmi.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Jernej Škrabec May 15, 2018, 5:15 a.m. UTC | #1
Hi!

Dne ponedeljek, 14. maj 2018 ob 22:49:52 CEST je Vasily Khoruzhick napisal(a):
> HSYNC is bit 8, and VSYNC is bit 9.
> 
> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>

Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>

Best regards,
Jernej

> ---
>  drivers/video/sunxi/sunxi_dw_hdmi.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/video/sunxi/sunxi_dw_hdmi.c
> b/drivers/video/sunxi/sunxi_dw_hdmi.c index c78e33b947..9dbea649a0 100644
> --- a/drivers/video/sunxi/sunxi_dw_hdmi.c
> +++ b/drivers/video/sunxi/sunxi_dw_hdmi.c
> @@ -303,10 +303,10 @@ static int sunxi_dw_hdmi_enable(struct udevice *dev,
> int panel_bpp,
> 
>  	sunxi_dw_hdmi_lcdc_init(priv->mux, edid, panel_bpp);
> 
> -	if (edid->flags & DISPLAY_FLAGS_HSYNC_LOW)
> +	if (edid->flags & DISPLAY_FLAGS_VSYNC_LOW)
>  		setbits_le32(&phy->pol, 0x200);
> 
> -	if (edid->flags & DISPLAY_FLAGS_VSYNC_LOW)
> +	if (edid->flags & DISPLAY_FLAGS_HSYNC_LOW)
>  		setbits_le32(&phy->pol, 0x100);
> 
>  	setbits_le32(&phy->ctrl, 0xf << 12);
> --
> 2.17.0
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Patch

diff --git a/drivers/video/sunxi/sunxi_dw_hdmi.c b/drivers/video/sunxi/sunxi_dw_hdmi.c
index c78e33b947..9dbea649a0 100644
--- a/drivers/video/sunxi/sunxi_dw_hdmi.c
+++ b/drivers/video/sunxi/sunxi_dw_hdmi.c
@@ -303,10 +303,10 @@  static int sunxi_dw_hdmi_enable(struct udevice *dev, int panel_bpp,
 
 	sunxi_dw_hdmi_lcdc_init(priv->mux, edid, panel_bpp);
 
-	if (edid->flags & DISPLAY_FLAGS_HSYNC_LOW)
+	if (edid->flags & DISPLAY_FLAGS_VSYNC_LOW)
 		setbits_le32(&phy->pol, 0x200);
 
-	if (edid->flags & DISPLAY_FLAGS_VSYNC_LOW)
+	if (edid->flags & DISPLAY_FLAGS_HSYNC_LOW)
 		setbits_le32(&phy->pol, 0x100);
 
 	setbits_le32(&phy->ctrl, 0xf << 12);