| Message ID | CAFULd4YbWaKN_Ki3_jDK947fV2gxuasy5PSpz8JKh4KLPyFanw@mail.gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | [i386] : Implement usadv64qi | expand |
Hello Uroš, On 09 мая 13:07, Uros Bizjak wrote: > This patch adds usadv64qi expander, so the compiler is able to > vectorize with 512bit vpsadbw insn. > > 2017-05-09 Uros Bizjak <ubizjak@gmail.com> > > PR target/85693 > * config/i386/sse.md (usadv64qi): New expander. > > Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. > > OK for mainline? Patch is OK. > > Uros. -- Thanks, K
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index ae6294e559c..0e625a4cc58 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -10878,6 +10878,21 @@ DONE; }) +(define_expand "usadv64qi" + [(match_operand:V16SI 0 "register_operand") + (match_operand:V64QI 1 "register_operand") + (match_operand:V64QI 2 "nonimmediate_operand") + (match_operand:V16SI 3 "nonimmediate_operand")] + "TARGET_AVX512BW" +{ + rtx t1 = gen_reg_rtx (V8DImode); + rtx t2 = gen_reg_rtx (V16SImode); + emit_insn (gen_avx512f_psadbw (t1, operands[1], operands[2])); + convert_move (t2, t1, 0); + emit_insn (gen_addv16si3 (operands[0], t2, operands[3])); + DONE; +}) + (define_insn "<mask_codefor>ashr<mode>3<mask_name>" [(set (match_operand:VI248_AVX512BW_1 0 "register_operand" "=v,v") (ashiftrt:VI248_AVX512BW_1
This patch adds usadv64qi expander, so the compiler is able to vectorize with 512bit vpsadbw insn. 2017-05-09 Uros Bizjak <ubizjak@gmail.com> PR target/85693 * config/i386/sse.md (usadv64qi): New expander. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. OK for mainline? Uros.