From patchwork Tue May 8 16:26:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 910331 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="rol6tILM"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40gQ1x6pgqz9s1w for ; Wed, 9 May 2018 02:29:57 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932945AbeEHQ3R (ORCPT ); Tue, 8 May 2018 12:29:17 -0400 Received: from mail-pl0-f66.google.com ([209.85.160.66]:42814 "EHLO mail-pl0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932735AbeEHQ3P (ORCPT ); Tue, 8 May 2018 12:29:15 -0400 Received: by mail-pl0-f66.google.com with SMTP id u6-v6so2534815pls.9; Tue, 08 May 2018 09:29:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Bjyf9Bn+HltNhb4OMyxy9n39mEczyfsL4RL2EwKlXMM=; b=rol6tILMBW3OUhw6eSABX53RMsAjnUaCPj7bie/mQMOy1gGF7fx0PILMqZKYidf0gw /pCfRVoQDh3wdURWYnLmol/SGcK1cuhVq1KPJcJD1oaA/q39i3pwtQtZXC4O664Dtl8V 7ZKKlplT3w9Npe/PKk0UB40Bmdu1EReWi6kxraqBezA3SmZwg9iefHA7/V6Dk3ReZhkq AGeVvmN2lYIZjy9D88yrm1AzrYrQbczXxoEZklsUBZM8iTOilMryyaXKVpHh984B0jC0 DvHjCcZtArr45jkYndz+5JmvVNiQ1qRHoLCESRqbRrwAGQb6dIFjXv7VUYLRov8UlMka vdxg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Bjyf9Bn+HltNhb4OMyxy9n39mEczyfsL4RL2EwKlXMM=; b=jRHJuJnwkiMc4iheA6zFpDeHTvH5Zrpi9b6T9wBSi/YqtovdFchwJCgZVi4zFJirNV iMqwC7NFeyE7IO6Y4WKlYiqOdn7D3fkJmu4F74yzqPOmaluAFe8O21pmWLNhIzJh7vRQ 9sv9LSmSEi8hMJckC/wUklTwFH5ApA5EM133KwvDRgICu+3qcGariq3C+kNQd+i2SvoO UoHqS8pp78V7nvC2wuxNX1BNcj6H7jMBBSHU9PgpC7YJb5Tyxzfar00DXd0llHrmTE62 QtObCuBUlRvMjVd8cP7PLglc5OBenez3sf21Odqk3OVOdL/uuBfhwvmPgs42k0HxOrDu 18sA== X-Gm-Message-State: ALQs6tBIK1b+Ua9vkuOngiWty4DCX3N3dK7gp6StqY/+DIEiDTIzb5Et QK30nIA497JM0PkocBL9SiE= X-Google-Smtp-Source: AB8JxZruXRRZNbV43CbALF5NUsHSY1O2viusk9XbyTrpBSuPF0RxynLv7mEc56/rHRKC1xV8QCJ+xA== X-Received: by 2002:a17:902:bb84:: with SMTP id m4-v6mr41918000pls.339.1525796954529; Tue, 08 May 2018 09:29:14 -0700 (PDT) Received: from localhost.localdomain ([109.252.91.130]) by smtp.gmail.com with ESMTPSA id o10-v6sm42083664pgc.80.2018.05.08.09.29.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 08 May 2018 09:29:14 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , Prashant Gaikwad , Stephen Boyd , Michael Turquette , Linus Walleij , Marcel Ziswiler , Marc Dietrich Cc: linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 2/4] clk: tegra20: Correct parents of CDEV1/2 clocks Date: Tue, 8 May 2018 19:26:05 +0300 Message-Id: <20180508162607.3500-4-digetx@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180508162607.3500-1-digetx@gmail.com> References: <20180508162607.3500-1-digetx@gmail.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Parents of CDEV1/2 clocks are determined by muxing of the corresponding pins. Pinctrl driver now provides the CDEV1/2 clock muxes and hence CDEV1/2 clocks could have correct parents. Set CDEV1/2 parents to the corresponding muxes to fix the parents. Signed-off-by: Dmitry Osipenko Reviewed-by: Marcel Ziswiler Tested-by: Marcel Ziswiler Tested-by: Marc Dietrich Acked-by: Peter De Schrijver Acked-by: Stephen Boyd --- drivers/clk/tegra/clk-tegra20.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c index ad5a7b5e3a39..636500a98561 100644 --- a/drivers/clk/tegra/clk-tegra20.c +++ b/drivers/clk/tegra/clk-tegra20.c @@ -846,14 +846,12 @@ static void __init tegra20_periph_clk_init(void) NULL); /* cdev1 */ - clk = clk_register_fixed_rate(NULL, "cdev1_fixed", NULL, 0, 26000000); - clk = tegra_clk_register_periph_gate("cdev1", "cdev1_fixed", 0, + clk = tegra_clk_register_periph_gate("cdev1", "cdev1_mux", 0, clk_base, 0, 94, periph_clk_enb_refcnt); clks[TEGRA20_CLK_CDEV1] = clk; /* cdev2 */ - clk = clk_register_fixed_rate(NULL, "cdev2_fixed", NULL, 0, 26000000); - clk = tegra_clk_register_periph_gate("cdev2", "cdev2_fixed", 0, + clk = tegra_clk_register_periph_gate("cdev2", "cdev2_mux", 0, clk_base, 0, 93, periph_clk_enb_refcnt); clks[TEGRA20_CLK_CDEV2] = clk;