From patchwork Mon May 7 15:36:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 909816 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="AlLHB24o"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40fmtY6217z9s34 for ; Tue, 8 May 2018 01:36:21 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752523AbeEGPgU (ORCPT ); Mon, 7 May 2018 11:36:20 -0400 Received: from mail-yb0-f196.google.com ([209.85.213.196]:34375 "EHLO mail-yb0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752280AbeEGPgS (ORCPT ); Mon, 7 May 2018 11:36:18 -0400 Received: by mail-yb0-f196.google.com with SMTP id b14-v6so10076518ybk.1; Mon, 07 May 2018 08:36:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=g4AjLqJM2GslmyJnXwiDtT0daU8Kyy4gveh23EkLx20=; b=AlLHB24o7v94Syt4vE1N5S45xAIAGjh3srQOKnCdNQ3S/Qg7fkRRanMejIc6GZZGT6 tWQksg6nKlLcKjgqQlEid3iQpYf8mQ7sK3q1wj2m1+Dg4OWtAIe5tIQIrRiOcyPJeQEV wJAz5DIPcQdYKDUlkmSAMPiO3fXU7FcKQgWUKxcrJ1ZVlBcsI9YY3NIDX8NAQuFDpCKC +CcZ0fsFFb0sXqXDhu9eydhwnd/sZJFCII03X3IYb6QXhdxhg8pdxcWYpscT2KKKsi7V y8WIF9+Uyrsf+EOJjTRUVE7Stbf42COH98tg7rhZBmLncIWlYzpe1oUHMLJceGeO5cuO z7Pw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=g4AjLqJM2GslmyJnXwiDtT0daU8Kyy4gveh23EkLx20=; b=WyotgvYDoMoOPF3ke1gqHwsp4xrsUEY+Hj7VFhIiVhGCz+E7XkwWJlgwyLFxnKFnet v/XbKfw+TTXIhBihNEK1tXLEL/ITmgDhGY9j9thuPOveKCS8GBfQ7H0jtnNl1ysDNYTe nTkCHiTUWteQ4LXyXexSDLDrBk06t8NkJCa/ZhygvFNR/YPzT/cebuhMTIDBP9C+AJNG luhRXKxy0DU864f9+zREssZBfDxLXSsHmBClJQbKIgPBxHNS3Ra64XPMrQIV9TPKD2hX 8Ds5mCqUj7oic82/j7ML+8t7OJcUnnTvsho183xl4sk7CIupl/2WF1+Cdql1UzOcSNPO WGXQ== X-Gm-Message-State: ALKqPwcmqLkwe8TnOyu0Ys3kNpGZs6y2hjFGTNjitZ6RAiUWVt0YyHl9 izmKRfoB846RZ0xUm6YRrYk= X-Google-Smtp-Source: AB8JxZozWrILmTbzXv6AQrjppnzUudgapi3rmY+9FEUMS8PzFfjNwmKg8oDfzfClaJb8BpLKJ+ooQQ== X-Received: by 2002:a25:bc53:: with SMTP id d19-v6mr2713417ybk.355.1525707377652; Mon, 07 May 2018 08:36:17 -0700 (PDT) Received: from localhost ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id b66-v6sm3278016ywf.58.2018.05.07.08.36.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 07 May 2018 08:36:17 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH 4/7] gpio: gpio-mm: Utilize for_each_set_port_word macro Date: Mon, 7 May 2018 11:36:10 -0400 Message-Id: <5ecf9d936d9a666e243c8f4a4857cc9eaaf23459.1525704095.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Replace boilerplate code in get_multiple/set_multiple callbacks with for_each_set_port_word macro to simplify code and improve clarity. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-gpio-mm.c | 67 +++++++++---------------------------- 1 file changed, 16 insertions(+), 51 deletions(-) diff --git a/drivers/gpio/gpio-gpio-mm.c b/drivers/gpio/gpio-gpio-mm.c index b56ff2efbf36..0ede33e7e251 100644 --- a/drivers/gpio/gpio-gpio-mm.c +++ b/drivers/gpio/gpio-gpio-mm.c @@ -172,46 +172,23 @@ static int gpiomm_gpio_get(struct gpio_chip *chip, unsigned int offset) return !!(port_state & mask); } +static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; + static int gpiomm_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip); size_t i; - static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; - const unsigned int gpio_reg_size = 8; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); + size_t word; + unsigned int offset; unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports); i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - - /* read bits from current gpio port */ + for_each_set_port_word(i, word, offset, mask, ARRAY_SIZE(ports), 8) { port_state = inb(gpiommgpio->base + ports[i]); - - /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + bits[word] |= port_state << offset; } return 0; @@ -242,37 +219,25 @@ static void gpiomm_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip); - unsigned int i; - const unsigned int gpio_reg_size = 8; - unsigned int port; - unsigned int out_port; + size_t i; + size_t word; + unsigned int offset; + unsigned int iomask; unsigned int bitmask; unsigned long flags; - /* set bits are evaluated a gpio register size at a time */ - for (i = 0; i < chip->ngpio; i += gpio_reg_size) { - /* no more set bits in this mask word; skip to the next word */ - if (!mask[BIT_WORD(i)]) { - i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size; - continue; - } - - port = i / gpio_reg_size; - out_port = (port > 2) ? port + 1 : port; - bitmask = mask[BIT_WORD(i)] & bits[BIT_WORD(i)]; + for_each_set_port_word(i, word, offset, mask, ARRAY_SIZE(ports), 8) { + iomask = mask[word] >> offset; + bitmask = iomask & (bits[word] >> offset); spin_lock_irqsave(&gpiommgpio->lock, flags); /* update output state data and set device gpio register */ - gpiommgpio->out_state[port] &= ~mask[BIT_WORD(i)]; - gpiommgpio->out_state[port] |= bitmask; - outb(gpiommgpio->out_state[port], gpiommgpio->base + out_port); + gpiommgpio->out_state[i] &= ~iomask; + gpiommgpio->out_state[i] |= bitmask; + outb(gpiommgpio->out_state[i], gpiommgpio->base + ports[i]); spin_unlock_irqrestore(&gpiommgpio->lock, flags); - - /* prepare for next gpio register set */ - mask[BIT_WORD(i)] >>= gpio_reg_size; - bits[BIT_WORD(i)] >>= gpio_reg_size; } }