pinctrl: mvebu: use correct MPP sel value for dev pins

Message ID	20180507022555.31645-1-chris.packham@alliedtelesis.co.nz
State	New
Headers	show Return-Path: <linux-gpio-owner@vger.kernel.org> From: Chris Packham <chris.packham@alliedtelesis.co.nz> To: gregory.clement@bootlin.com, linus.walleij@linaro.org, linux-gpio@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Chris Packham <chris.packham@alliedtelesis.co.nz>, Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>, Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>, linux-arm-kernel@lists.infradead.org Subject: [PATCH] pinctrl: mvebu: use correct MPP sel value for dev pins Date: Mon, 7 May 2018 14:25:55 +1200 Message-Id: <20180507022555.31645-1-chris.packham@alliedtelesis.co.nz> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk
Series	pinctrl: mvebu: use correct MPP sel value for dev pins \| expand pinctrl: mvebu: use correct MPP sel value for dev pins

Message ID

20180507022555.31645-1-chris.packham@alliedtelesis.co.nz

State

New

Headers

From: Chris Packham <chris.packham@alliedtelesis.co.nz>
To: gregory.clement@bootlin.com, linus.walleij@linaro.org,
	linux-gpio@vger.kernel.org
Cc: linux-kernel@vger.kernel.org,
	Chris Packham <chris.packham@alliedtelesis.co.nz>,
	Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH] pinctrl: mvebu: use correct MPP sel value for dev pins
Date: Mon,  7 May 2018 14:25:55 +1200
Message-Id: <20180507022555.31645-1-chris.packham@alliedtelesis.co.nz>
Sender: linux-gpio-owner@vger.kernel.org
Precedence: bulk

Series

pinctrl: mvebu: use correct MPP sel value for dev pins | expand

Commit Message

Chris Packham May 7, 2018, 2:25 a.m. UTC

The "dev" function is selected with the value 0x4 not 0x01.

Fixes: commit d7ae8f8dee7f ("pinctrl: mvebu: pinctrl driver for 98DX3236 SoC")
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---
 drivers/pinctrl/mvebu/pinctrl-armada-xp.c | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

Comments

Linus Walleij May 16, 2018, 12:55 p.m. UTC | #1

On Mon, May 7, 2018 at 4:25 AM, Chris Packham
<chris.packham@alliedtelesis.co.nz> wrote:

> The "dev" function is selected with the value 0x4 not 0x01.
>
> Fixes: commit d7ae8f8dee7f ("pinctrl: mvebu: pinctrl driver for 98DX3236 SoC")
> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>

Patch applied.

Does it need to go into fixes? Stable?

Yours,
Linus Walleij
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Chris Packham May 16, 2018, 8:58 p.m. UTC | #2

On 17/05/18 00:55, Linus Walleij wrote:
> On Mon, May 7, 2018 at 4:25 AM, Chris Packham
> <chris.packham@alliedtelesis.co.nz> wrote:
> 
>> The "dev" function is selected with the value 0x4 not 0x01.
>>
>> Fixes: commit d7ae8f8dee7f ("pinctrl: mvebu: pinctrl driver for 98DX3236 SoC")
>> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
> 
> Patch applied.
> 
> Does it need to go into fixes? Stable?

By "fixes" do you mean into 4.17? Yes please.

Stable would be good. Although all the boards I'm aware of rely on the 
pin configuration being done by the bootloader so I've not heard of 
anyone experiencing problems.

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diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-xp.c b/drivers/pinctrl/mvebu/pinctrl-armada-xp.c
index 28b199796fae..5e828468e43d 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-xp.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-xp.c
@@ -437,34 +437,34 @@  static struct mvebu_mpp_mode mv98dx3236_mpp_modes[] = {
 		 MPP_VAR_FUNCTION(0x4, "dev", "we0",         V_98DX3236_PLUS)),
 	MPP_MODE(21,
 		 MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
-		 MPP_VAR_FUNCTION(0x1, "dev", "ad0",         V_98DX3236_PLUS)),
+		 MPP_VAR_FUNCTION(0x4, "dev", "ad0",         V_98DX3236_PLUS)),
 	MPP_MODE(22,
 		 MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
-		 MPP_VAR_FUNCTION(0x1, "dev", "ad1",         V_98DX3236_PLUS)),
+		 MPP_VAR_FUNCTION(0x4, "dev", "ad1",         V_98DX3236_PLUS)),
 	MPP_MODE(23,
 		 MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
-		 MPP_VAR_FUNCTION(0x1, "dev", "ad2",         V_98DX3236_PLUS)),
+		 MPP_VAR_FUNCTION(0x4, "dev", "ad2",         V_98DX3236_PLUS)),
 	MPP_MODE(24,
 		 MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
-		 MPP_VAR_FUNCTION(0x1, "dev", "ad3",         V_98DX3236_PLUS)),
+		 MPP_VAR_FUNCTION(0x4, "dev", "ad3",         V_98DX3236_PLUS)),
 	MPP_MODE(25,
 		 MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
-		 MPP_VAR_FUNCTION(0x1, "dev", "ad4",         V_98DX3236_PLUS)),
+		 MPP_VAR_FUNCTION(0x4, "dev", "ad4",         V_98DX3236_PLUS)),
 	MPP_MODE(26,
 		 MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
-		 MPP_VAR_FUNCTION(0x1, "dev", "ad5",         V_98DX3236_PLUS)),
+		 MPP_VAR_FUNCTION(0x4, "dev", "ad5",         V_98DX3236_PLUS)),
 	MPP_MODE(27,
 		 MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
-		 MPP_VAR_FUNCTION(0x1, "dev", "ad6",         V_98DX3236_PLUS)),
+		 MPP_VAR_FUNCTION(0x4, "dev", "ad6",         V_98DX3236_PLUS)),
 	MPP_MODE(28,
 		 MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
-		 MPP_VAR_FUNCTION(0x1, "dev", "ad7",         V_98DX3236_PLUS)),
+		 MPP_VAR_FUNCTION(0x4, "dev", "ad7",         V_98DX3236_PLUS)),
 	MPP_MODE(29,
 		 MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
-		 MPP_VAR_FUNCTION(0x1, "dev", "a0",          V_98DX3236_PLUS)),
+		 MPP_VAR_FUNCTION(0x4, "dev", "a0",          V_98DX3236_PLUS)),
 	MPP_MODE(30,
 		 MPP_VAR_FUNCTION(0x0, "gpo", NULL,          V_98DX3236_PLUS),
-		 MPP_VAR_FUNCTION(0x1, "dev", "a1",          V_98DX3236_PLUS)),
+		 MPP_VAR_FUNCTION(0x4, "dev", "a1",          V_98DX3236_PLUS)),
 	MPP_MODE(31,
 		 MPP_VAR_FUNCTION(0x0, "gpio", NULL,         V_98DX3236_PLUS),
 		 MPP_VAR_FUNCTION(0x1, "slv_smi", "mdc",     V_98DX3236_PLUS),