diff mbox series

[U-Boot,v2,11/11] sandbox: tests: Add tests for mc34708 PMIC device

Message ID 20180506202608.5899-12-lukma@denx.de
State Superseded
Delegated to: Lukasz Majewski
Headers show
Series pmic: sandbox: Add support for MC34709 PMIC | expand

Commit Message

Lukasz Majewski May 6, 2018, 8:26 p.m. UTC 
Following tests has been added for mc34708 device:

- get_test for mc34708 PMIC
- Check if proper number of registers is read
- Check if default (emulated via i2c device) value is properly read
- Check if value write/read operation is correct
- Perform tests to check if pmic_clrsetbits() is working correctly

Signed-off-by: Lukasz Majewski <lukma@denx.de>

---

Changes in v2:
- New patch

 test/dm/pmic.c | 56 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 56 insertions(+)

Comments

Simon Glass May 13, 2018, 10:02 p.m. UTC | #1 
On 7 May 2018 at 06:26, Lukasz Majewski <lukma@denx.de> wrote:
> Following tests has been added for mc34708 device:
>
> - get_test for mc34708 PMIC
> - Check if proper number of registers is read
> - Check if default (emulated via i2c device) value is properly read
> - Check if value write/read operation is correct
> - Perform tests to check if pmic_clrsetbits() is working correctly
>
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
>
> ---
>
> Changes in v2:
> - New patch
>
>  test/dm/pmic.c | 56 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 56 insertions(+)

Reviewed-by: Simon Glass <sjg@chromium.org>
diff mbox series

Patch

diff --git a/test/dm/pmic.c b/test/dm/pmic.c
index 83994f5f9f..30513a9e41 100644
--- a/test/dm/pmic.c
+++ b/test/dm/pmic.c
@@ -20,6 +20,7 @@ 
 #include <power/pmic.h>
 #include <power/sandbox_pmic.h>
 #include <test/ut.h>
+#include <fsl_pmic.h>
 
 /* Test PMIC get method */
 
@@ -45,6 +46,16 @@  static int dm_test_power_pmic_get(struct unit_test_state *uts)
 }
 DM_TEST(dm_test_power_pmic_get, DM_TESTF_SCAN_FDT);
 
+/* PMIC get method - MC34708 - for 3 bytes transmission */
+static int dm_test_power_pmic_mc34708_get(struct unit_test_state *uts)
+{
+	power_pmic_get(uts, "mc34708_pmic");
+
+	return 0;
+}
+
+DM_TEST(dm_test_power_pmic_mc34708_get, DM_TESTF_SCAN_FDT);
+
 /* Test PMIC I/O */
 static int dm_test_power_pmic_io(struct unit_test_state *uts)
 {
@@ -73,3 +84,48 @@  static int dm_test_power_pmic_io(struct unit_test_state *uts)
 	return 0;
 }
 DM_TEST(dm_test_power_pmic_io, DM_TESTF_SCAN_FDT);
+
+#define MC34708_PMIC_REG_COUNT 64
+#define MC34708_PMIC_TEST_VAL 0x125534
+static int dm_test_power_pmic_mc34708_regs_check(struct unit_test_state *uts)
+{
+	struct udevice *dev;
+	int reg_count;
+
+	ut_assertok(pmic_get("mc34708_pmic", &dev));
+
+	/* Check number of PMIC registers */
+	reg_count = pmic_reg_count(dev);
+	ut_asserteq(reg_count, MC34708_PMIC_REG_COUNT);
+
+	return 0;
+}
+
+DM_TEST(dm_test_power_pmic_mc34708_regs_check, DM_TESTF_SCAN_FDT);
+
+static int dm_test_power_pmic_mc34708_rw_val(struct unit_test_state *uts)
+{
+	struct udevice *dev;
+	int val;
+
+	ut_assertok(pmic_get("mc34708_pmic", &dev));
+
+	/* Check if single 3 byte read is successful */
+	val = pmic_reg_read(dev, REG_POWER_CTL2);
+	ut_asserteq(val, 0x422100);
+
+	/* Check if RW works */
+	val = 0;
+	ut_assertok(pmic_reg_write(dev, REG_RTC_TIME, val));
+	ut_assertok(pmic_reg_write(dev, REG_RTC_TIME, MC34708_PMIC_TEST_VAL));
+	val = pmic_reg_read(dev, REG_RTC_TIME);
+	ut_asserteq(val, MC34708_PMIC_TEST_VAL);
+
+	pmic_clrsetbits(dev, REG_POWER_CTL2, 0x3 << 8, 1 << 9);
+	val = pmic_reg_read(dev, REG_POWER_CTL2);
+	ut_asserteq(val, (0x422100 & ~(0x3 << 8)) | (1 << 9));
+
+	return 0;
+}
+
+DM_TEST(dm_test_power_pmic_mc34708_rw_val, DM_TESTF_SCAN_FDT);