From patchwork Fri May 4 10:28:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vasant Hegde X-Patchwork-Id: 908662 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 40cpHR576Kz9s1d for ; Fri, 4 May 2018 20:32:35 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 40cpHR3jN6zDqkh for ; Fri, 4 May 2018 20:32:35 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=hegdevasant@linux.vnet.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 40cpCg0z53zDrDT for ; Fri, 4 May 2018 20:29:18 +1000 (AEST) Received: from pps.filterd (m0098421.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w44AT2m5116668 for ; Fri, 4 May 2018 06:29:16 -0400 Received: from e06smtp13.uk.ibm.com (e06smtp13.uk.ibm.com [195.75.94.109]) by mx0a-001b2d01.pphosted.com with ESMTP id 2hrkx4e0xy-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Fri, 04 May 2018 06:29:16 -0400 Received: from localhost by e06smtp13.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Fri, 4 May 2018 11:29:13 +0100 Received: from d06av25.portsmouth.uk.ibm.com (d06av25.portsmouth.uk.ibm.com [9.149.105.61]) by b06cxnps4074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w44ATCsB3735970; Fri, 4 May 2018 10:29:12 GMT Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2BAA011C050; Fri, 4 May 2018 11:20:45 +0100 (BST) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0D90211C05C; Fri, 4 May 2018 11:20:44 +0100 (BST) Received: from hegdevasant.in.ibm.com (unknown [9.199.177.123]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 4 May 2018 11:20:43 +0100 (BST) From: Vasant Hegde To: skiboot@lists.ozlabs.org Date: Fri, 4 May 2018 15:58:17 +0530 X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180504102817.11059-1-hegdevasant@linux.vnet.ibm.com> References: <20180504102817.11059-1-hegdevasant@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18050410-0012-0000-0000-000005D1ECFF X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18050410-0013-0000-0000-0000194F1991 Message-Id: <20180504102817.11059-18-hegdevasant@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-05-04_03:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1805040097 Subject: [Skiboot] [PATCH v2 17/17] fadump: Add support to trigger memory preserving IPL on BMC system X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stewart@linux.vnet.ibm.com MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" On FSP based system we call 'attn' instruction. FSP detects attention and initiates memory preserving IPL. On BMC system we have to call SBE s0 interrupt to initiate memory preserving IPL. This patch adds support to call s0 interrupt. Sequence : - s0 interrupt on slave chip SBE - s0 interrupt on master chip SBE Signed-off-by: Vasant Hegde --- hw/ipmi/ipmi-attn.c | 4 ++++ hw/sbe-p9.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++ include/sbe-p9.h | 10 ++++++++++ 3 files changed, 62 insertions(+) diff --git a/hw/ipmi/ipmi-attn.c b/hw/ipmi/ipmi-attn.c index 8ff872c62..15aeace56 100644 --- a/hw/ipmi/ipmi-attn.c +++ b/hw/ipmi/ipmi-attn.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -65,6 +66,9 @@ static void ipmi_log_terminate_event(const char *msg) void __attribute__((noreturn)) ipmi_terminate(const char *msg) { + /* On P9 BMC system this will trigger fadump */ + p9_sbe_terminate(); + /* Terminate called before initializing IPMI (early abort) */ if (!ipmi_present()) { if (platform.cec_reboot) diff --git a/hw/sbe-p9.c b/hw/sbe-p9.c index 12d9e97ff..8502bafce 100644 --- a/hw/sbe-p9.c +++ b/hw/sbe-p9.c @@ -931,3 +931,51 @@ void p9_sbe_init(void) /* Initiate SBE timeout poller */ opal_add_poller(p9_sbe_timeout_poll, NULL); } + +/* Terminate and initiate MPIPL */ +void p9_sbe_terminate(void) +{ + uint32_t chip_id; + uint32_t primary_chip = -1; + int rc; + struct dt_node *xn; + + if (proc_gen < proc_gen_p9) + return; + + dt_for_each_compatible(dt_root, xn, "ibm,xscom") { + chip_id = dt_get_chip_id(xn); + + if (dt_has_node_property(xn, "primary", NULL)) { + primary_chip = chip_id; + continue; + } + + rc = xscom_write(chip_id, + SBE_CONTROL_REG_RW, SBE_CONTROL_REG_S0); + /* Initiate normal reboot */ + if (rc) { + prlog(PR_ERR, "Failed to write S0 interrupt [chip id = %x]\n", + chip_id); + return; + } + } + + if (primary_chip == -1) { + prlog(PR_ERR, "Master chip ID not found.\n"); + return; + } + + /* Write S0 interrupt on master SBE */ + rc = xscom_write(primary_chip, + SBE_CONTROL_REG_RW, SBE_CONTROL_REG_S0); + /* Initiate normal reboot */ + if (rc) { + prlog(PR_ERR, "Failed to write S0 interrupt [chip id = %x]\n", + primary_chip); + return; + } + + while (1) + time_wait_ms(100); +} diff --git a/include/sbe-p9.h b/include/sbe-p9.h index 7101dc700..396d38940 100644 --- a/include/sbe-p9.h +++ b/include/sbe-p9.h @@ -103,6 +103,13 @@ #define SBE_HOST_TIMER_EXPIRY PPC_BIT(14) #define SBE_HOST_RESPONSE_MASK (PPC_BITMASK(0, 4) | SBE_HOST_TIMER_EXPIRY) +/* SBE Control Register */ +#define SBE_CONTROL_REG_RW 0x00050008 + +/* SBE interrupt s0/s1 bits */ +#define SBE_CONTROL_REG_S0 PPC_BIT(14) +#define SBE_CONTROL_REG_S1 PPC_BIT(15) + /* SBE Target Type */ #define SBE_TARGET_TYPE_PROC 0x00 #define SBE_TARGET_TYPE_EX 0x01 @@ -243,4 +250,7 @@ extern void p9_sbe_update_timer_expiry(uint64_t new_target); /* Send skiboot relocated base address to SBE */ extern void p9_sbe_send_relocated_base(uint64_t val); +/* Terminate and trigger MPIPL */ +extern void p9_sbe_terminate(void); + #endif /* __SBE_P9_H */