Patchwork [U-Boot,2/3] Initialize second PHY on OpenRD-Client and OpenRD-Ultimate.

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Submitter Clint Adams
Date April 12, 2011, 6:44 p.m.
Message ID <1302633858-4096-2-git-send-email-clint@debian.org>
Download mbox | patch
Permalink /patch/90848/
State Superseded
Headers show

Comments

Clint Adams - April 12, 2011, 6:44 p.m.
(rework of Julian Pidancet's patch)
---
 board/Marvell/openrd_base/openrd_base.c |   24 ++++++++++++++++++++----
 include/configs/openrd_base.h           |   14 ++++++++++++--
 2 files changed, 32 insertions(+), 6 deletions(-)
Detlev Zundel - April 13, 2011, 11:13 a.m.
Hi Clint,

> (rework of Julian Pidancet's patch)
> ---
>  board/Marvell/openrd_base/openrd_base.c |   24 ++++++++++++++++++++----
>  include/configs/openrd_base.h           |   14 ++++++++++++--
>  2 files changed, 32 insertions(+), 6 deletions(-)

Sorry to jump in a little bit late here, but can you please look at the
excellent work of Andy Flemin on an universal phy infrastructure[1]?
Can't we use that also as a base for your board and eliminate duplicated
phy code?

Thanks for looking into this!
  Detlev

[1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/97560
Prafulla Wadaskar - April 13, 2011, 2:18 p.m.
> -----Original Message-----
> From: Clint Adams [mailto:clint@debian.org]
> Sent: Wednesday, April 13, 2011 12:14 AM
> To: u-boot@lists.denx.de
> Cc: Prafulla Wadaskar; julian.pidancet@citrix.com; Clint Adams
> Subject: [PATCH 2/3] Initialize second PHY on OpenRD-Client and OpenRD-
> Ultimate.
> 
> (rework of Julian Pidancet's patch)
> ---
>  board/Marvell/openrd_base/openrd_base.c |   24 ++++++++++++++++++++----
>  include/configs/openrd_base.h           |   14 ++++++++++++--
>  2 files changed, 32 insertions(+), 6 deletions(-)
> 
> diff --git a/board/Marvell/openrd_base/openrd_base.c
> b/board/Marvell/openrd_base/openrd_base.c
> index f7c63ac..cb0f0fe 100644
> --- a/board/Marvell/openrd_base/openrd_base.c
> +++ b/board/Marvell/openrd_base/openrd_base.c
> @@ -124,12 +124,11 @@ int board_init(void)
>  }
> 
>  #ifdef CONFIG_RESET_PHY_R
> -/* Configure and enable MV88E1116 PHY */
> -void reset_phy(void)
> +/* Configure and enable MV88E1116/88E1121 PHY */
> +void mv_phy_init(char *name)
>  {
>  	u16 reg;
>  	u16 devadr;
> -	char *name = "egiga0";
> 
>  	if (miiphy_set_current_dev(name))
>  		return;
> @@ -154,6 +153,23 @@ void reset_phy(void)
>  	/* reset the phy */
>  	miiphy_reset(name, devadr);
> 
> -	printf("88E1116 Initialized on %s\n", name);
> +	printf(PHY_NO" Initialized on %s\n", name);
> +}
> +
> +void reset_phy(void)
> +{
> +       mv_phy_init("egiga0");
> +
> +#ifdef CONFIG_BOARD_IS_OPENRD_CLIENT
> +       /* Kirkwood ethernet driver is written with the assumption that
> in case
> +        * of multiple PHYs, their addresses are consecutive. But
> unfortunately
> +        * in case of OpenRD-Client, PHY addresses are not
> consecutive.*/
> +       miiphy_write("egiga1", 0xEE, 0xEE, 24);
> +#endif
> +
> +#if defined(CONFIG_BOARD_IS_OPENRD_CLIENT) ||
> defined(CONFIG_BOARD_IS_OPENRD_ULTIMATE)

The line is too long >80 chars

Regards..
Prafulla . .

Patch

diff --git a/board/Marvell/openrd_base/openrd_base.c b/board/Marvell/openrd_base/openrd_base.c
index f7c63ac..cb0f0fe 100644
--- a/board/Marvell/openrd_base/openrd_base.c
+++ b/board/Marvell/openrd_base/openrd_base.c
@@ -124,12 +124,11 @@  int board_init(void)
 }
 
 #ifdef CONFIG_RESET_PHY_R
-/* Configure and enable MV88E1116 PHY */
-void reset_phy(void)
+/* Configure and enable MV88E1116/88E1121 PHY */
+void mv_phy_init(char *name)
 {
 	u16 reg;
 	u16 devadr;
-	char *name = "egiga0";
 
 	if (miiphy_set_current_dev(name))
 		return;
@@ -154,6 +153,23 @@  void reset_phy(void)
 	/* reset the phy */
 	miiphy_reset(name, devadr);
 
-	printf("88E1116 Initialized on %s\n", name);
+	printf(PHY_NO" Initialized on %s\n", name);
+}
+
+void reset_phy(void)
+{
+       mv_phy_init("egiga0");
+
+#ifdef CONFIG_BOARD_IS_OPENRD_CLIENT
+       /* Kirkwood ethernet driver is written with the assumption that in case
+        * of multiple PHYs, their addresses are consecutive. But unfortunately
+        * in case of OpenRD-Client, PHY addresses are not consecutive.*/
+       miiphy_write("egiga1", 0xEE, 0xEE, 24);
+#endif
+
+#if defined(CONFIG_BOARD_IS_OPENRD_CLIENT) || defined(CONFIG_BOARD_IS_OPENRD_ULTIMATE)
+       /* configure and initialize both PHY's */
+       mv_phy_init("egiga1");
+#endif
 }
 #endif /* CONFIG_RESET_PHY_R */
diff --git a/include/configs/openrd_base.h b/include/configs/openrd_base.h
index 5e05890..aa13908 100644
--- a/include/configs/openrd_base.h
+++ b/include/configs/openrd_base.h
@@ -117,8 +117,18 @@ 
  * Ethernet Driver configuration
  */
 #ifdef CONFIG_CMD_NET
-#define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
-#define CONFIG_PHY_BASE_ADR	0x8
+# ifdef CONFIG_BOARD_IS_OPENRD_BASE
+#  define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
+# else
+#  define CONFIG_MVGBE_PORTS	{1, 1}	/* enable both ports */
+# endif
+# ifdef CONFIG_BOARD_IS_OPENRD_ULTIMATE
+#  define CONFIG_PHY_BASE_ADR	0x0
+#  define PHY_NO		"88E1121"
+# else
+#  define CONFIG_PHY_BASE_ADR	0x8
+#  define PHY_NO		"88E1116"
+# endif
 #endif /* CONFIG_CMD_NET */
 
 /*