Patchwork [U-Boot] da850evm: fix NAND WSTROBE and TA timings

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Submitter Ben Gardiner
Date April 12, 2011, 6:35 p.m.
Message ID <1302633346-29366-1-git-send-email-bengardiner@nanometrics.ca>
Download mbox | patch
Permalink /patch/90844/
State Accepted
Commit 24a514c44557601de52df3c8bc0ee789bef8714c
Headers show

Comments

Ben Gardiner - April 12, 2011, 6:35 p.m.
The current NAND timings, introduced in commit
a3f88293ddd13facd734769c1664d35ab4ed681f da850evm: setup the NAND flash
timings , incorrectly set WSTROBE and TA to 0. A more recent inspection of the
values set by the Linux kernel indicates that these should be set to 1.

Set the WSTROBE and TA field of the EMIFA cycle-count timings configuration to
1 to match the values set by linux.

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Stefano Babic <sbabic@denx.de>
CC: Sandeep Paulraj <s-paulraj@ti.com>
CC: Scott Wood <scottwood@freescale.com>
---
 board/davinci/da8xxevm/da850evm.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
Sandeep Paulraj - April 20, 2011, 8:26 p.m.
> The current NAND timings, introduced in commit
> a3f88293ddd13facd734769c1664d35ab4ed681f da850evm: setup the NAND flash
> timings , incorrectly set WSTROBE and TA to 0. A more recent inspection of
> the
> values set by the Linux kernel indicates that these should be set to 1.
> 
> Set the WSTROBE and TA field of the EMIFA cycle-count timings
> configuration to
> 1 to match the values set by linux.
> 
> Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
> CC: Stefano Babic <sbabic@denx.de>
> CC: Sandeep Paulraj <s-paulraj@ti.com>
> CC: Scott Wood <scottwood@freescale.com>
> ---
>  board/davinci/da8xxevm/da850evm.c |    4 ++--
>  1 files changed, 2 insertions(+), 2 deletions(-)

Thanks

Pushed to u-boot-ti

--Sandeep

Patch

diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c
index b088c9c..73eaa48 100644
--- a/board/davinci/da8xxevm/da850evm.c
+++ b/board/davinci/da8xxevm/da850evm.c
@@ -179,12 +179,12 @@  int board_init(void)
 	 * Linux kernel @ 25MHz EMIFA
 	 */
 	writel((DAVINCI_ABCR_WSETUP(0) |
-		DAVINCI_ABCR_WSTROBE(0) |
+		DAVINCI_ABCR_WSTROBE(1) |
 		DAVINCI_ABCR_WHOLD(0) |
 		DAVINCI_ABCR_RSETUP(0) |
 		DAVINCI_ABCR_RSTROBE(1) |
 		DAVINCI_ABCR_RHOLD(0) |
-		DAVINCI_ABCR_TA(0) |
+		DAVINCI_ABCR_TA(1) |
 		DAVINCI_ABCR_ASIZE_8BIT),
 	       &davinci_emif_regs->ab2cr); /* CS3 */
 #endif