Patchwork doubled words

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Submitter Mike Stump
Date April 10, 2011, 7:06 p.m.
Message ID <CD1EE7FD-4126-4C0F-BB18-DD1F15756941@comcast.net>
Download mbox | patch
Permalink /patch/90532/
State New
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Comments

Mike Stump - April 10, 2011, 7:06 p.m.
On Apr 10, 2011, at 4:54 AM, Jim Meyering wrote:
> I've noticed/fixed a few occurrences of doubled words like "the the",

I've fixed the obviously wrong ones in gcc/.* excluding ada and go.  I don't hate Ada and go, since I don't pretend to keep up on rules to their parts of the tree.  I did do java, but only gcc/java, as I think we still can put in obvious work there.  One or more of the ones you listed were spurious, I didn't change those.

I'm skipping everything not gcc/.*, as I don't keep up on the various rules.  One disadvantage of having a multiplicity of rules.  :-(  Longer term, would be nice to remove some of the multiplicity of rules.

I also re-flowed a few of these to make them prettier and fixed the English on a few.

Thanks.

Patch

Index: doc/tm.texi
===================================================================
--- doc/tm.texi	(revision 172246)
+++ doc/tm.texi	(working copy)
@@ -94,7 +94,7 @@ 
 Similarly, there is a @code{targetcm} variable for hooks that are
 specific to front ends for C-family languages, documented as ``C
 Target Hook''.  This is declared in @file{c-family/c-target.h}, the
-the initializer @code{TARGETCM_INITIALIZER} in
+initializer @code{TARGETCM_INITIALIZER} in
 @file{c-family/c-target-def.h}.  If targets initialize @code{targetcm}
 themselves, they should set @code{target_has_targetcm=yes} in
 @file{config.gcc}; otherwise a default definition is used.
@@ -2332,7 +2332,7 @@ 
 certain operand, you should define a class @code{FLOAT_OR_GENERAL_REGS}
 which includes both of them.  Otherwise you will get suboptimal code,
 or even internal compiler errors when reload cannot find a register in the
-the class computed via @code{reg_class_subunion}.
+class computed via @code{reg_class_subunion}.
 
 You must also specify certain redundant information about the register
 classes: for each class, which classes contain it and which ones are
Index: doc/tm.texi.in
===================================================================
--- doc/tm.texi.in	(revision 172246)
+++ doc/tm.texi.in	(working copy)
@@ -94,7 +94,7 @@ 
 Similarly, there is a @code{targetcm} variable for hooks that are
 specific to front ends for C-family languages, documented as ``C
 Target Hook''.  This is declared in @file{c-family/c-target.h}, the
-the initializer @code{TARGETCM_INITIALIZER} in
+initializer @code{TARGETCM_INITIALIZER} in
 @file{c-family/c-target-def.h}.  If targets initialize @code{targetcm}
 themselves, they should set @code{target_has_targetcm=yes} in
 @file{config.gcc}; otherwise a default definition is used.
@@ -2322,7 +2322,7 @@ 
 certain operand, you should define a class @code{FLOAT_OR_GENERAL_REGS}
 which includes both of them.  Otherwise you will get suboptimal code,
 or even internal compiler errors when reload cannot find a register in the
-the class computed via @code{reg_class_subunion}.
+class computed via @code{reg_class_subunion}.
 
 You must also specify certain redundant information about the register
 classes: for each class, which classes contain it and which ones are
Index: doc/invoke.texi
===================================================================
--- doc/invoke.texi	(revision 172246)
+++ doc/invoke.texi	(working copy)
@@ -7708,7 +7708,7 @@ 
 
 This option enables the extraction of object files with GIMPLE bytecode out of
 library archives. This improves the quality of optimization by exposing more
-code the the link time optimizer.  This information specify what symbols 
+code the link time optimizer.  This information specify what symbols 
 can be accessed externally (by non-LTO object or during dynamic linking).
 Resulting code quality improvements on binaries (and shared libraries that do
 use hidden visibility) is similar to @code{-fwhole-program}.  See
Index: targhooks.c
===================================================================
--- targhooks.c	(revision 172246)
+++ targhooks.c	(working copy)
@@ -1189,9 +1189,10 @@ 
   else if (!caller_opts)
     ret = false;
 
-  /* If both caller and callee have attributes, assume that if the pointer is
-     different, the the two functions have different target options since
-     build_target_option_node uses a hash table for the options.  */
+  /* If both caller and callee have attributes, assume that if the
+     pointer is different, the two functions have different target
+     options since build_target_option_node uses a hash table for the
+     options.  */
   else
     ret = (callee_opts == caller_opts);
 
Index: regstat.c
===================================================================
--- regstat.c	(revision 172246)
+++ regstat.c	(working copy)
@@ -42,7 +42,7 @@ 
    REG_N_SETS and REG_N_REFS.
    ----------------------------------------------------------------------------*/
 
-/* If a pass need to change these values in some magical way or or the
+/* If a pass need to change these values in some magical way or the
    pass needs to have accurate values for these and is not using
    incremental df scanning, then it should use REG_N_SETS and
    REG_N_USES.  If the pass is doing incremental scanning then it
Index: c-family/c-ada-spec.c
===================================================================
--- c-family/c-ada-spec.c	(revision 172246)
+++ c-family/c-ada-spec.c	(working copy)
@@ -3233,7 +3233,7 @@ 
 
   pkg_name = get_ada_package (source_file);
 
-  /* Construct the the .ads filename and package name.  */
+  /* Construct the .ads filename and package name.  */
   ads_name = xstrdup (pkg_name);
 
   for (s = ads_name; *s; s++)
Index: gengtype.c
===================================================================
--- gengtype.c	(revision 172246)
+++ gengtype.c	(working copy)
@@ -1952,7 +1952,7 @@ 
 
 /* An output file, suitable for definitions, that can see declarations
    made in INPF and is linked into every language that uses INPF.
-   Since the the result is cached inside INPF, that argument cannot be
+   Since the result is cached inside INPF, that argument cannot be
    declared constant, but is "almost" constant. */
 
 outf_p
Index: java/jcf-parse.c
===================================================================
--- java/jcf-parse.c	(revision 172246)
+++ java/jcf-parse.c	(working copy)
@@ -1762,7 +1762,7 @@ 
 	      next = list + count;
 	      avail = avail - count;
 	    }
-	  /* Subtract to to guarantee space for final '\0'. */
+	  /* Subtract one to guarantee space for final '\0'. */
 	  count = fread (next, 1, avail - 1, finput);
 	  if (count == 0)
 	    {
Index: objc/objc-next-runtime-abi-02.c
===================================================================
--- objc/objc-next-runtime-abi-02.c	(revision 172246)
+++ objc/objc-next-runtime-abi-02.c	(working copy)
@@ -2159,7 +2159,7 @@ 
     }
 
     /* TODO: delete the vec.  */
-    /* TODO: upgrade to the the clang/llvm hidden version.  */
+    /* TODO: upgrade to the clang/llvm hidden version.  */
 }
 
 /* This routine declares a variable to hold meta data for 'struct
Index: cgraphunit.c
===================================================================
--- cgraphunit.c	(revision 172246)
+++ cgraphunit.c	(working copy)
@@ -45,9 +45,9 @@ 
       This function is called once (source level) compilation unit is finalized
       and it will no longer change.
 
-      In the the call-graph construction and local function
-      analysis takes place here.  Bodies of unreachable functions are released
-      to conserve memory usage.
+      In the call-graph construction and local function analysis takes
+      place here.  Bodies of unreachable functions are released to
+      conserve memory usage.
 
       The function can be called multiple times when multiple source level
       compilation units are combined (such as in C frontend)
Index: regs.h
===================================================================
--- regs.h	(revision 172246)
+++ regs.h	(working copy)
@@ -44,7 +44,7 @@ 
    regstat_init_n_sets_and_refs from the current values of
    DF_REG_DEF_COUNT and DF_REG_USE_COUNT.  REG_N_REFS and REG_N_SETS
    should only be used if a pass need to change these values in some
-   magical way or or the pass needs to have accurate values for these
+   magical way or the pass needs to have accurate values for these
    and is not using incremental df scanning.
 
    At the end of a pass that uses REG_N_REFS and REG_N_SETS, a call
Index: cp/decl.c
===================================================================
--- cp/decl.c	(revision 172246)
+++ cp/decl.c	(working copy)
@@ -1089,7 +1089,7 @@ 
     return;
 
   /* If the old declaration was `static', or the new one isn't, then
-     then everything is OK.  */
+     everything is OK.  */
   if (DECL_THIS_STATIC (olddecl) || !DECL_THIS_STATIC (newdecl))
     return;
 
Index: cp/name-lookup.c
===================================================================
--- cp/name-lookup.c	(revision 172246)
+++ cp/name-lookup.c	(working copy)
@@ -4146,10 +4146,10 @@ 
   /* Look through namespace aliases.  */
   scope = ORIGINAL_NAMESPACE (scope);
 
-  /* Algorithm: Starting with SCOPE, walk through the the set of used
+  /* Algorithm: Starting with SCOPE, walk through the set of used
      namespaces.  For each used namespace, look through its inline
-     namespace set for any bindings and usings.  If no bindings are found,
-     add any usings seen to the set of used namespaces.  */
+     namespace set for any bindings and usings.  If no bindings are
+     found, add any usings seen to the set of used namespaces.  */
   VEC_safe_push (tree, gc, todo, scope);
 
   while (VEC_length (tree, todo))
Index: haifa-sched.c
===================================================================
--- haifa-sched.c	(revision 172246)
+++ haifa-sched.c	(working copy)
@@ -852,7 +852,7 @@ 
   /* A USE insn should never require the value used to be computed.
      This allows the computation of a function's result and parameter
      values to overlap the return and call.  We don't care about the
-     the dependence cost when only decreasing register pressure.  */
+     dependence cost when only decreasing register pressure.  */
   if (recog_memoized (used) < 0)
     {
       cost = 0;
Index: ira-int.h
===================================================================
--- ira-int.h	(revision 172246)
+++ ira-int.h	(working copy)
@@ -805,7 +805,7 @@ 
   int x_ira_class_subset_p[N_REG_CLASSES][N_REG_CLASSES];
 
   /* Array of the number of hard registers of given class which are
-     available for allocation.  The order is defined by the the hard
+     available for allocation.  The order is defined by the hard
      register numbers.  */
   short x_ira_non_ordered_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
 
Index: sel-sched.c
===================================================================
--- sel-sched.c	(revision 172246)
+++ sel-sched.c	(working copy)
@@ -2741,7 +2741,7 @@ 
         sel_print ("real successors num: %d\n", sinfo->all_succs_n);
     }
 
-  /* Add insn to to the tail of current path.  */
+  /* Add insn to the tail of current path.  */
   ilist_add (&p, insn);
 
   FOR_EACH_VEC_ELT (rtx, sinfo->succs_ok, is, succ)
Index: cfganal.c
===================================================================
--- cfganal.c	(revision 172246)
+++ cfganal.c	(working copy)
@@ -650,7 +650,7 @@ 
 }
 
 /* Compute reverse top sort order.  This is computing a post order
-   numbering of the graph.  If INCLUDE_ENTRY_EXIT is true, then then
+   numbering of the graph.  If INCLUDE_ENTRY_EXIT is true, then
    ENTRY_BLOCK and EXIT_BLOCK are included.  If DELETE_UNREACHABLE is
    true, unreachable blocks are deleted.  */
 
Index: matrix-reorg.c
===================================================================
--- matrix-reorg.c	(revision 172246)
+++ matrix-reorg.c	(working copy)
@@ -846,7 +846,7 @@ 
 }
 
 /* The transposing decision making.
-   In order to to calculate the profitability of transposing, we collect two
+   In order to calculate the profitability of transposing, we collect two
    types of information regarding the accesses:
    1. profiling information used to express the hotness of an access, that
    is how often the matrix is accessed by this access site (count of the
Index: fortran/trans-expr.c
===================================================================
--- fortran/trans-expr.c	(revision 172246)
+++ fortran/trans-expr.c	(working copy)
@@ -3600,7 +3600,7 @@ 
   /* If there are alternate return labels, function type should be
      integer.  Can't modify the type in place though, since it can be shared
      with other functions.  For dummy arguments, the typing is done to
-     to this result, even if it has to be repeated for each call.  */
+     this result, even if it has to be repeated for each call.  */
   if (has_alternate_specifier
       && TREE_TYPE (TREE_TYPE (TREE_TYPE (se->expr))) != integer_type_node)
     {
Index: fortran/gfortran.texi
===================================================================
--- fortran/gfortran.texi	(revision 172246)
+++ fortran/gfortran.texi	(working copy)
@@ -810,7 +810,7 @@ 
 including @code{PASS}, @code{PROCEDURE} and @code{GENERIC}, and
 operators bound to a type.
 
-@item Abstract interfaces and and type extension with the possibility to
+@item Abstract interfaces and type extension with the possibility to
 override type-bound procedures or to have deferred binding.
 
 @item Polymorphic entities (``@code{CLASS}'') for derived types -- including
Index: fortran/trans-types.c
===================================================================
--- fortran/trans-types.c	(revision 172246)
+++ fortran/trans-types.c	(working copy)
@@ -2225,7 +2225,7 @@ 
     goto copy_derived_types;
 
   /* If a whole file compilation, the derived types from an earlier
-     namespace can be used as the the canonical type.  */
+     namespace can be used as the canonical type.  */
   if (gfc_option.flag_whole_file
 	&& derived->backend_decl == NULL
 	&& !derived->attr.use_assoc
Index: fortran/frontend-passes.c
===================================================================
--- fortran/frontend-passes.c	(revision 172246)
+++ fortran/frontend-passes.c	(working copy)
@@ -886,7 +886,7 @@ 
 	      break;
 
 	    /* Fall through to the variable case in order to walk the
-	       the reference.  */
+	       reference.  */
 
 	  case EXPR_SUBSTRING:
 	  case EXPR_VARIABLE:
Index: fortran/trans-decl.c
===================================================================
--- fortran/trans-decl.c	(revision 172246)
+++ fortran/trans-decl.c	(working copy)
@@ -1697,7 +1697,7 @@ 
 
   /* Initialize DECL_EXTERNAL and TREE_PUBLIC before calling decl_attributes;
      TREE_PUBLIC specifies whether a function is globally addressable (i.e.
-     the the opposite of declaring a function as static in C).  */
+     the opposite of declaring a function as static in C).  */
   DECL_EXTERNAL (fndecl) = 1;
   TREE_PUBLIC (fndecl) = 1;
 
@@ -1780,7 +1780,7 @@ 
 
   /* Initialize DECL_EXTERNAL and TREE_PUBLIC before calling decl_attributes;
      TREE_PUBLIC specifies whether a function is globally addressable (i.e.
-     the the opposite of declaring a function as static in C).  */
+     the opposite of declaring a function as static in C).  */
   DECL_EXTERNAL (fndecl) = 0;
 
   if (!current_function_decl
Index: fortran/target-memory.c
===================================================================
--- fortran/target-memory.c	(revision 172246)
+++ fortran/target-memory.c	(working copy)
@@ -495,7 +495,7 @@ 
       /* The constructor points to the component.  */
       c->n.component = cmp;
 
-      /* Calculate the offset, which consists of the the FIELD_OFFSET in
+      /* Calculate the offset, which consists of the FIELD_OFFSET in
 	 bytes, which appears in multiples of DECL_OFFSET_ALIGN-bit-sized,
 	 and additional bits of FIELD_BIT_OFFSET. The code assumes that all
 	 sizes of the components are multiples of BITS_PER_UNIT,
Index: fortran/intrinsic.texi
===================================================================
--- fortran/intrinsic.texi	(revision 172246)
+++ fortran/intrinsic.texi	(working copy)
@@ -2763,7 +2763,7 @@ 
 @smallexample
    use iso_fortran_env
    print '(4a)', 'This file was compiled by ', &
-                 compiler_version(), ' using the the options ', &
+                 compiler_version(), ' using the options ', &
                  compiler_options()
    end
 @end smallexample
@@ -2805,7 +2805,7 @@ 
 @smallexample
    use iso_fortran_env
    print '(4a)', 'This file was compiled by ', &
-                 compiler_version(), ' using the the options ', &
+                 compiler_version(), ' using the options ', &
                  compiler_options()
    end
 @end smallexample
Index: ira-emit.c
===================================================================
--- ira-emit.c	(revision 172246)
+++ ira-emit.c	(working copy)
@@ -229,7 +229,7 @@ 
     }
 }
 
-/* Return TRUE if the the move list LIST1 and LIST2 are equal (two
+/* Return TRUE if the move list LIST1 and LIST2 are equal (two
    moves are equal if they involve the same allocnos).  */
 static bool
 eq_move_lists_p (move_t list1, move_t list2)
Index: genhooks.c
===================================================================
--- genhooks.c	(revision 172246)
+++ genhooks.c	(working copy)
@@ -37,7 +37,7 @@ 
 #undef DEFHOOK
 };
 
-/* For each @Fcode in the the first paragraph of the documentation string DOC,
+/* For each @Fcode in the first paragraph of the documentation string DOC,
    print an @findex directive.  HOOK_NAME is the name of the hook this bit of
    documentation pertains to.  */
 static void
Index: lto/lto.c
===================================================================
--- lto/lto.c	(revision 172246)
+++ lto/lto.c	(working copy)
@@ -186,9 +186,10 @@ 
 }
 
 
-/* Decode the content of memory pointed to by DATA in the the
-   in decl state object STATE. DATA_IN points to a data_in structure for
-   decoding. Return the address after the decoded object in the input.  */
+/* Decode the content of memory pointed to by DATA in the in decl
+   state object STATE. DATA_IN points to a data_in structure for
+   decoding. Return the address after the decoded object in the
+   input.  */
 
 static const uint32_t *
 lto_read_in_decl_state (struct data_in *data_in, const uint32_t *data,
Index: ipa-prop.c
===================================================================
--- ipa-prop.c	(revision 172246)
+++ ipa-prop.c	(working copy)
@@ -1515,9 +1515,9 @@ 
   info->uses_analysis_done = 1;
 }
 
-/* Initialize the array describing properties of of formal parameters of NODE,
-   analyze their uses and and compute jump functions associated with actual
-   arguments of calls from within NODE.  */
+/* Initialize the array describing properties of of formal parameters
+   of NODE, analyze their uses and compute jump functions associated
+   with actual arguments of calls from within NODE.  */
 
 void
 ipa_analyze_node (struct cgraph_node *node)
Index: gimple.c
===================================================================
--- gimple.c	(revision 172246)
+++ gimple.c	(working copy)
@@ -2314,7 +2314,7 @@ 
 /* Return true if the RHS of statement S has side effects.
    We may use it to determine if it is admissable to replace
    an assignment or call with a copy of a previously-computed
-   value.  In such cases, side-effects due the the LHS are
+   value.  In such cases, side-effects due to the LHS are
    preserved.  */
 
 bool
Index: config/s390/s390.c
===================================================================
--- config/s390/s390.c	(revision 172246)
+++ config/s390/s390.c	(working copy)
@@ -4012,7 +4012,7 @@ 
 }
 
 /* Try a machine-dependent way of reloading an illegitimate address AD
-   operand.  If we find one, push the reload and and return the new address.
+   operand.  If we find one, push the reload and return the new address.
 
    MODE is the mode of the enclosing MEM.  OPNUM is the operand number
    and TYPE is the reload type of the current reload.  */
Index: config/spu/spu.c
===================================================================
--- config/spu/spu.c	(revision 172246)
+++ config/spu/spu.c	(working copy)
@@ -2662,13 +2662,14 @@ 
 
 /* The SPU might hang when it executes 48 inline instructions after a
    hinted branch jumps to its hinted target.  The beginning of a
-   function and the return from a call might have been hinted, and must
-   be handled as well.  To prevent a hang we insert 2 hbrps.  The first
-   should be within 6 insns of the branch target.  The second should be
-   within 22 insns of the branch target.  When determining if hbrps are
-   necessary, we look for only 32 inline instructions, because up to to
-   12 nops and 4 hbrps could be inserted.  Similarily, when inserting
-   new hbrps, we insert them within 4 and 16 insns of the target.  */
+   function and the return from a call might have been hinted, and
+   must be handled as well.  To prevent a hang we insert 2 hbrps.  The
+   first should be within 6 insns of the branch target.  The second
+   should be within 22 insns of the branch target.  When determining
+   if hbrps are necessary, we look for only 32 inline instructions,
+   because up to 12 nops and 4 hbrps could be inserted.  Similarily,
+   when inserting new hbrps, we insert them within 4 and 16 insns of
+   the target.  */
 static void
 insert_hbrp (void)
 {
@@ -4370,7 +4371,7 @@ 
     {
       /* We use the associated declaration to make sure the access is
          referring to the whole object.
-         We check both MEM_EXPR and and SYMBOL_REF_DECL.  I'm not sure
+         We check both MEM_EXPR and SYMBOL_REF_DECL.  I'm not sure
          if it is necessary.  Will there be cases where one exists, and
          the other does not?  Will there be cases where both exist, but
          have different types?  */
Index: config/i386/smmintrin.h
===================================================================
--- config/i386/smmintrin.h	(revision 172246)
+++ config/i386/smmintrin.h	(working copy)
@@ -597,7 +597,7 @@ 
 #define _SIDD_CMP_EQUAL_EACH		0x08
 #define _SIDD_CMP_EQUAL_ORDERED		0x0c
 
-/* These macros specify the the polarity.  */
+/* These macros specify the polarity.  */
 #define _SIDD_POSITIVE_POLARITY		0x00
 #define _SIDD_NEGATIVE_POLARITY		0x10
 #define _SIDD_MASKED_POSITIVE_POLARITY	0x20
Index: config/i386/i386.c
===================================================================
--- config/i386/i386.c	(revision 172246)
+++ config/i386/i386.c	(working copy)
@@ -16249,7 +16249,7 @@ 
 }
 
 /* Split 32bit/64bit divmod with 8bit unsigned divmod if dividend and
-   divisor are within the the range [0-255].  */
+   divisor are within the range [0-255].  */
 
 void
 ix86_split_idivmod (enum machine_mode mode, rtx operands[],
@@ -16283,7 +16283,7 @@ 
 
   scratch = gen_reg_rtx (mode);
 
-  /* Use 8bit unsigned divimod if dividend and divisor are within the
+  /* Use 8bit unsigned divimod if dividend and divisor are within
      the range [0-255].  */
   emit_move_insn (scratch, operands[2]);
   scratch = expand_simple_binop (mode, IOR, scratch, operands[3],
@@ -20984,23 +20984,24 @@ 
   return ret;
 }
 
-/* Expand string move (memcpy) operation.  Use i386 string operations when
-   profitable.  expand_setmem contains similar code.  The code depends upon
-   architecture, block size and alignment, but always has the same
-   overall structure:
+/* Expand string move (memcpy) operation.  Use i386 string operations
+   when profitable.  expand_setmem contains similar code.  The code
+   depends upon architecture, block size and alignment, but always has
+   the same overall structure:
 
    1) Prologue guard: Conditional that jumps up to epilogues for small
-      blocks that can be handled by epilogue alone.  This is faster but
-      also needed for correctness, since prologue assume the block is larger
-      than the desired alignment.
+      blocks that can be handled by epilogue alone.  This is faster
+      but also needed for correctness, since prologue assume the block
+      is larger than the desired alignment.
 
       Optional dynamic check for size and libcall for large
       blocks is emitted here too, with -minline-stringops-dynamically.
 
-   2) Prologue: copy first few bytes in order to get destination aligned
-      to DESIRED_ALIGN.  It is emitted only when ALIGN is less than
-      DESIRED_ALIGN and and up to DESIRED_ALIGN - ALIGN bytes can be copied.
-      We emit either a jump tree on power of two sized blocks, or a byte loop.
+   2) Prologue: copy first few bytes in order to get destination
+      aligned to DESIRED_ALIGN.  It is emitted only when ALIGN is less
+      than DESIRED_ALIGN and up to DESIRED_ALIGN - ALIGN bytes can be
+      copied.  We emit either a jump tree on power of two sized
+      blocks, or a byte loop.
 
    3) Main body: the copying loop itself, copying in SIZE_NEEDED chunks
       with specified algorithm.
Index: config/sh/sh.c
===================================================================
--- config/sh/sh.c	(revision 172246)
+++ config/sh/sh.c	(working copy)
@@ -9105,7 +9105,7 @@ 
   return 0;
 }
 
-/* Returns the function vector number, if the the attribute
+/* Returns the function vector number, if the attribute
    'function_vector' is assigned, otherwise returns zero.  */
 int
 sh2a_get_function_vector_number (rtx x)
Index: config/cris/cris.md
===================================================================
--- config/cris/cris.md	(revision 172246)
+++ config/cris/cris.md	(working copy)
@@ -2509,7 +2509,7 @@ 
 
 ;; The addi insn as it is normally used.
 
-;; Make the the ACR alternative taste bad enough to not choose it as a
+;; Make the ACR alternative taste bad enough to not choose it as a
 ;; preference to avoid spilling problems (unwind-dw2-fde.c at build).
 ;; FIXME: Revisit for new register allocator.
 
Index: config/arm/arm.c
===================================================================
--- config/arm/arm.c	(revision 172246)
+++ config/arm/arm.c	(working copy)
@@ -9505,7 +9505,7 @@ 
    from that base register.
    REGS is an array filled in with the destination register numbers.
    SAVED_ORDER (if nonnull), is an array filled in with an order that maps
-   insn numbers to to an ascending order of stores.  If CHECK_REGS is true,
+   insn numbers to an ascending order of stores.  If CHECK_REGS is true,
    the sequence of registers in REGS matches the loads from ascending memory
    locations, and the function verifies that the register numbers are
    themselves ascending.  If CHECK_REGS is false, the register numbers
@@ -9653,7 +9653,7 @@ 
    array filled in with the source register numbers, REG_RTXS (if nonnull) is
    likewise filled with the corresponding rtx's.
    SAVED_ORDER (if nonnull), is an array filled in with an order that maps insn
-   numbers to to an ascending order of stores.
+   numbers to an ascending order of stores.
    If CHECK_REGS is true, the sequence of registers in *REGS matches the stores
    from ascending memory locations, and the function verifies that the register
    numbers are themselves ascending.  If CHECK_REGS is false, the register
@@ -23007,7 +23007,7 @@ 
 static unsigned arm_insn_count;
 
 /* An emitter that counts emitted instructions but does not actually
-   emit instruction into the the instruction stream.  */
+   emit instruction into the instruction stream.  */
 static void
 arm_count (int label,
 	   const char *pattern ATTRIBUTE_UNUSED,
Index: config/arm/arm.md
===================================================================
--- config/arm/arm.md	(revision 172246)
+++ config/arm/arm.md	(working copy)
@@ -97,7 +97,7 @@ 
                         ; generate correct unwind information.
   UNSPEC_PIC_OFFSET     ; A symbolic 12-bit OFFSET that has been treated
                         ; correctly for PIC usage.
-  UNSPEC_GOTSYM_OFF     ; The offset of the start of the the GOT from a
+  UNSPEC_GOTSYM_OFF     ; The offset of the start of the GOT from a
                         ; a given symbolic address.
   UNSPEC_THUMB1_CASESI  ; A Thumb1 compressed dispatch-table call.
   UNSPEC_RBIT           ; rbit operation.
Index: config/mips/mips-protos.h
===================================================================
--- config/mips/mips-protos.h	(revision 172246)
+++ config/mips/mips-protos.h	(working copy)
@@ -72,7 +72,7 @@ 
 
    SYMBOL_GOTOFF_DISP
        An UNSPEC wrapper around a SYMBOL_GOT_DISP.  It represents the
-       the offset from _gp of the symbol's GOT entry.
+       offset from _gp of the symbol's GOT entry.
 
    SYMBOL_GOTOFF_CALL
        Like SYMBOL_GOTOFF_DISP, but used when calling a global function.
Index: config/mips/mips.c
===================================================================
--- config/mips/mips.c	(revision 172246)
+++ config/mips/mips.c	(working copy)
@@ -10783,25 +10783,26 @@ 
 			       enum machine_mode to ATTRIBUTE_UNUSED,
 			       enum reg_class rclass)
 {
-  /* There are several problems with changing the modes of values
-     in floating-point registers:
+  /* There are several problems with changing the modes of values in
+     floating-point registers:
 
      - When a multi-word value is stored in paired floating-point
-       registers, the first register always holds the low word.
-       We therefore can't allow FPRs to change between single-word
-       and multi-word modes on big-endian targets.
+       registers, the first register always holds the low word.  We
+       therefore can't allow FPRs to change between single-word and
+       multi-word modes on big-endian targets.
 
-     - GCC assumes that each word of a multiword register can be accessed
-       individually using SUBREGs.  This is not true for floating-point
-       registers if they are bigger than a word.
+     - GCC assumes that each word of a multiword register can be
+       accessed individually using SUBREGs.  This is not true for
+       floating-point registers if they are bigger than a word.
 
      - Loading a 32-bit value into a 64-bit floating-point register
-       will not sign-extend the value, despite what LOAD_EXTEND_OP says.
-       We can't allow FPRs to change from SImode to to a wider mode on
-       64-bit targets.
+       will not sign-extend the value, despite what LOAD_EXTEND_OP
+       says.  We can't allow FPRs to change from SImode to a wider
+       mode on 64-bit targets.
 
-     - If the FPU has already interpreted a value in one format, we must
-       not ask it to treat the value as having a different format.
+     - If the FPU has already interpreted a value in one format, we
+       must not ask it to treat the value as having a different
+       format.
 
      We therefore disallow all mode changes involving FPRs.  */
   return reg_classes_intersect_p (FP_REGS, rclass);
Index: lto-streamer.c
===================================================================
--- lto-streamer.c	(revision 172246)
+++ lto-streamer.c	(working copy)
@@ -529,7 +529,7 @@ 
 
 
 /* Generate a vector of common nodes and make sure they are merged
-   properly according to the the gimple type table.  */
+   properly according to the gimple type table.  */
 
 static VEC(tree,heap) *
 lto_get_common_nodes (void)