@@ -180,7 +180,7 @@ config CPU_ARM1176
select HAS_VBAR
select SYS_CACHE_SHIFT_5
-config CPU_V7
+config CPU_V7A
bool
select HAS_VBAR
select HAS_THUMB2
@@ -207,7 +207,7 @@ config SYS_CPU
default "arm946es" if CPU_ARM946ES
default "arm1136" if CPU_ARM1136
default "arm1176" if CPU_ARM1176
- default "armv7" if CPU_V7
+ default "armv7" if CPU_V7A
default "armv7m" if CPU_V7M
default "pxa" if CPU_PXA
default "sa1100" if CPU_SA1100
@@ -221,7 +221,7 @@ config SYS_ARM_ARCH
default 5 if CPU_ARM946ES
default 6 if CPU_ARM1136
default 6 if CPU_ARM1176
- default 7 if CPU_V7
+ default 7 if CPU_V7A
default 7 if CPU_V7M
default 5 if CPU_PXA
default 4 if CPU_SA1100
@@ -244,7 +244,7 @@ config SYS_CACHELINE_SIZE
config ARM_SMCCC
bool "Support for ARM SMC Calling Convention (SMCCC)"
- depends on CPU_V7 || ARM64
+ depends on CPU_V7A || ARM64
select ARM_PSCI_FW
help
Say Y here if you want to enable ARM SMC Calling Convention.
@@ -429,7 +429,7 @@ config TARGET_SPEAR600
config TARGET_STV0991
bool "Support stv0991"
- select CPU_V7
+ select CPU_V7A
select DM
select DM_SERIAL
select DM_SPI
@@ -481,36 +481,36 @@ config ARCH_BCM283X
config TARGET_VEXPRESS_CA15_TC2
bool "Support vexpress_ca15_tc2"
- select CPU_V7
+ select CPU_V7A
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select PL011_SERIAL
config TARGET_VEXPRESS_CA5X2
bool "Support vexpress_ca5x2"
- select CPU_V7
+ select CPU_V7A
select PL011_SERIAL
config TARGET_VEXPRESS_CA9X4
bool "Support vexpress_ca9x4"
- select CPU_V7
+ select CPU_V7A
select PL011_SERIAL
config TARGET_BCM23550_W1D
bool "Support bcm23550_w1d"
- select CPU_V7
+ select CPU_V7A
imply CRC32_VERIFY
imply FAT_WRITE
config TARGET_BCM28155_AP
bool "Support bcm28155_ap"
- select CPU_V7
+ select CPU_V7A
imply CRC32_VERIFY
imply FAT_WRITE
config TARGET_BCMCYGNUS
bool "Support bcmcygnus"
- select CPU_V7
+ select CPU_V7A
imply CRC32_VERIFY
imply CMD_HASH
imply FAT_WRITE
@@ -521,7 +521,7 @@ config TARGET_BCMCYGNUS
config TARGET_BCMNSP
bool "Support bcmnsp"
- select CPU_V7
+ select CPU_V7A
config TARGET_BCMNS2
bool "Support Broadcom Northstar2"
@@ -544,7 +544,7 @@ config ARCH_EXYNOS
config ARCH_S5PC1XX
bool "Samsung S5PC1XX"
- select CPU_V7
+ select CPU_V7A
select DM
select DM_SERIAL
select DM_GPIO
@@ -552,7 +552,7 @@ config ARCH_S5PC1XX
config ARCH_HIGHBANK
bool "Calxeda Highbank"
- select CPU_V7
+ select CPU_V7A
select PL011_SERIAL
config ARCH_INTEGRATOR
@@ -563,7 +563,7 @@ config ARCH_INTEGRATOR
config ARCH_KEYSTONE
bool "TI Keystone"
- select CPU_V7
+ select CPU_V7A
select SUPPORT_SPL
select SYS_THUMB_BUILD
select CMD_POWEROFF
@@ -573,7 +573,7 @@ config ARCH_KEYSTONE
config ARCH_OMAP2PLUS
bool "TI OMAP2+"
- select CPU_V7
+ select CPU_V7A
select SPL_BOARD_INIT if SPL
select SPL_STACK_R if SPL
select SUPPORT_SPL
@@ -611,13 +611,13 @@ config ARCH_MX28
config ARCH_MX7ULP
bool "NXP MX7ULP"
- select CPU_V7
+ select CPU_V7A
select ROM_UNIFIED_SECTIONS
imply MXC_GPIO
config ARCH_MX7
bool "Freescale MX7"
- select CPU_V7
+ select CPU_V7A
select SYS_FSL_HAS_SEC if SECURE_BOOT
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
@@ -627,7 +627,7 @@ config ARCH_MX7
config ARCH_MX6
bool "Freescale MX6"
- select CPU_V7
+ select CPU_V7A
select SYS_FSL_HAS_SEC if SECURE_BOOT
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
@@ -641,7 +641,7 @@ endif
config ARCH_MX5
bool "Freescale MX5"
- select CPU_V7
+ select CPU_V7A
select BOARD_EARLY_INIT_F
imply MXC_GPIO
@@ -677,7 +677,7 @@ config ARCH_SNAPDRAGON
config ARCH_SOCFPGA
bool "Altera SOCFPGA family"
- select CPU_V7
+ select CPU_V7A
select SUPPORT_SPL
select OF_CONTROL
select SPL_OF_CONTROL
@@ -734,7 +734,7 @@ config ARCH_SUNXI
config ARCH_VF610
bool "Freescale Vybrid"
- select CPU_V7
+ select CPU_V7A
select SYS_FSL_ERRATUM_ESDHC111
imply CMD_MTDPARTS
imply NAND
@@ -742,7 +742,7 @@ config ARCH_VF610
config ARCH_ZYNQ
bool "Xilinx Zynq based platform"
select BOARD_LATE_INIT
- select CPU_V7
+ select CPU_V7A
select SUPPORT_SPL
select OF_CONTROL
select SPL_BOARD_INIT if SPL
@@ -982,7 +982,7 @@ config TARGET_LS1088ARDB
config TARGET_LS1021AQDS
bool "Support ls1021aqds"
select BOARD_LATE_INIT
- select CPU_V7
+ select CPU_V7A
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select SUPPORT_SPL
@@ -996,7 +996,7 @@ config TARGET_LS1021AQDS
config TARGET_LS1021ATWR
bool "Support ls1021atwr"
select BOARD_LATE_INIT
- select CPU_V7
+ select CPU_V7A
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select SUPPORT_SPL
@@ -1009,7 +1009,7 @@ config TARGET_LS1021ATWR
config TARGET_LS1021AIOT
bool "Support ls1021aiot"
select BOARD_LATE_INIT
- select CPU_V7
+ select CPU_V7A
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select SUPPORT_SPL
@@ -1125,7 +1125,7 @@ config STM32
config ARCH_STI
bool "Support STMicrolectronics SoCs"
- select CPU_V7
+ select CPU_V7A
select DM
select DM_SERIAL
select BLK
@@ -3,7 +3,7 @@
#
ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TEGRA),yy)
-CONFIG_CPU_V7=
+CONFIG_CPU_V7A=
CONFIG_CPU_ARM720T=y
endif
@@ -16,7 +16,7 @@ arch-$(CONFIG_CPU_SA1100) =-march=armv4
arch-$(CONFIG_CPU_PXA) =
arch-$(CONFIG_CPU_ARM1136) =-march=armv5
arch-$(CONFIG_CPU_ARM1176) =-march=armv5t
-arch-$(CONFIG_CPU_V7) =$(call cc-option, -march=armv7-a, \
+arch-$(CONFIG_CPU_V7A) =$(call cc-option, -march=armv7-a, \
$(call cc-option, -march=armv7, -march=armv5))
arch-$(CONFIG_ARM64) =-march=armv8-a
@@ -40,7 +40,7 @@ tune-$(CONFIG_CPU_SA1100) =-mtune=strongarm1100
tune-$(CONFIG_CPU_PXA) =-mcpu=xscale
tune-$(CONFIG_CPU_ARM1136) =
tune-$(CONFIG_CPU_ARM1176) =
-tune-$(CONFIG_CPU_V7) =
+tune-$(CONFIG_CPU_V7A) =
tune-$(CONFIG_ARM64) =
# Evaluate tune cc-option calls now
@@ -1,4 +1,4 @@
-if CPU_V7
+if CPU_V7A
config CPU_V7_HAS_NONSEC
bool
@@ -52,7 +52,7 @@ config ARMV7_PSCI_NR_CPUS
config ARMV7_LPAE
bool "Use LPAE page table format" if EXPERT
- depends on CPU_V7
+ depends on CPU_V7A
default n
---help---
Say Y here to use the long descriptor page table format. This is
@@ -451,7 +451,7 @@ enum dcache_option {
DCACHE_WRITEBACK = TTB_SECT | TTB_SECT_MAIR(2),
DCACHE_WRITEALLOC = TTB_SECT | TTB_SECT_MAIR(3),
};
-#elif defined(CONFIG_CPU_V7)
+#elif defined(CONFIG_CPU_V7A)
/* Short-Descriptor Translation Table Level 1 Bits */
#define TTB_SECT_NS_MASK (1 << 19)
#define TTB_SECT_NG_MASK (1 << 17)
@@ -493,7 +493,7 @@ enum {
MMU_SECTION_SIZE = 1 << MMU_SECTION_SHIFT,
};
-#ifdef CONFIG_CPU_V7
+#ifdef CONFIG_CPU_V7A
/* TTBR0 bits */
#define TTBR0_BASE_ADDR_MASK 0xFFFFC000
#define TTBR0_RGN_NC (0 << 3)
@@ -161,7 +161,7 @@ static inline void mmu_setup(void)
asm volatile("mcr p15, 0, %0, c10, c2, 0"
: : "r" (MEMORY_ATTRIBUTES) : "memory");
}
-#elif defined(CONFIG_CPU_V7)
+#elif defined(CONFIG_CPU_V7A)
if (is_hyp()) {
/* Set HTCR to disable LPAE */
asm volatile("mcr p15, 4, %0, c2, c0, 2"
@@ -45,15 +45,15 @@ config AT91SAM9X5
config SAMA5D2
bool
- select CPU_V7
+ select CPU_V7A
config SAMA5D3
bool
- select CPU_V7
+ select CPU_V7A
config SAMA5D4
bool
- select CPU_V7
+ select CPU_V7A
choice
prompt "Atmel AT91 board select"
@@ -158,7 +158,7 @@ config TARGET_SAMA5D2_XPLAINED
config TARGET_SAMA5D27_SOM1_EK
bool "SAMA5D27 SOM1 EK board"
- select CPU_V7
+ select CPU_V7A
select SUPPORT_SPL
select BOARD_EARLY_INIT_F
select BOARD_LATE_INIT
@@ -250,7 +250,7 @@ config TARGET_WB45N
config TARGET_WB50N
bool "Support Laird WB50N"
select BOARD_LATE_INIT
- select CPU_V7
+ select CPU_V7A
select SUPPORT_SPL
select BOARD_EARLY_INIT_F
@@ -293,6 +293,6 @@ source "board/laird/wb50n/Kconfig"
config SPL_LDSCRIPT
default "arch/arm/mach-at91/arm926ejs/u-boot-spl.lds" if CPU_ARM926EJS
- default "arch/arm/mach-at91/armv7/u-boot-spl.lds" if CPU_V7
+ default "arch/arm/mach-at91/armv7/u-boot-spl.lds" if CPU_V7A
endif
@@ -18,4 +18,4 @@ endif
obj-y += clock.o
obj-$(CONFIG_CPU_ARM920T) += arm920t/
obj-$(CONFIG_CPU_ARM926EJS) += arm926ejs/
-obj-$(CONFIG_CPU_V7) += armv7/
+obj-$(CONFIG_CPU_V7A) += armv7/
@@ -2,7 +2,7 @@ ifeq ($(CONFIG_CPU_ARM926EJS),y)
PLATFORM_CPPFLAGS += $(call cc-option,-mtune=arm926ejs,)
endif
-ifeq ($(CONFIG_CPU_V7),y)
+ifeq ($(CONFIG_CPU_V7A),y)
ifndef CONFIG_SPL_BUILD
ALL-y += u-boot.img
endif
@@ -7,7 +7,7 @@ config BCM2836
bool "Broadcom BCM2836 SoC support"
depends on ARCH_BCM283X
select ARMV7_LPAE
- select CPU_V7
+ select CPU_V7A
config BCM2837
bool "Broadcom BCM2837 SoC support"
@@ -18,7 +18,7 @@ config BCM2837_32B
depends on ARCH_BCM283X
select BCM2837
select ARMV7_LPAE
- select CPU_V7
+ select CPU_V7A
config BCM2837_64B
bool "Broadcom BCM2837 SoC 64-bit support"
@@ -6,7 +6,7 @@ choice
config ARCH_EXYNOS4
bool "Exynos4 SoC family"
- select CPU_V7
+ select CPU_V7A
select BOARD_EARLY_INIT_F
help
Samsung Exynos4 SoC family are based on ARM Cortex-A9 CPU. There
@@ -15,7 +15,7 @@ config ARCH_EXYNOS4
config ARCH_EXYNOS5
bool "Exynos5 SoC family"
- select CPU_V7
+ select CPU_V7A
select BOARD_EARLY_INIT_F
select SHA_HW_ACCEL
imply CRC32_VERIFY
@@ -6,7 +6,7 @@
#
obj-y += soc.o
-obj-$(CONFIG_CPU_V7) += clock.o pinmux.o power.o system.o
+obj-$(CONFIG_CPU_V7A) += clock.o pinmux.o power.o system.o
obj-$(CONFIG_ARM64) += mmu-arm64.o
obj-$(CONFIG_EXYNOS5420) += sec_boot.o
@@ -21,7 +21,7 @@ void *secondary_boot_addr = (void *)_main;
void reset_cpu(ulong addr)
{
-#ifdef CONFIG_CPU_V7
+#ifdef CONFIG_CPU_V7A
writel(0x1, samsung_get_base_swreset());
#endif
}
@@ -6,7 +6,7 @@ config HAVE_MVEBU_EFUSE
config ARMADA_32BIT
bool
- select CPU_V7
+ select CPU_V7A
select SUPPORT_SPL
select SPL_DM
select SPL_DM_SEQ_ALIAS
@@ -14,7 +14,7 @@ endif
config TARGET_QEMU_ARM_32BIT
bool "Support qemu_arm"
depends on ARCH_QEMU
- select CPU_V7
+ select CPU_V7A
select ARCH_SUPPORT_PSCI
config TARGET_QEMU_ARM_64BIT
@@ -6,7 +6,7 @@ choice
config RCAR_32
bool "Renesas ARM SoCs R-Car Gen1/Gen2 (32bit)"
- select CPU_V7
+ select CPU_V7A
config RCAR_GEN3
bool "Renesas ARM SoCs R-Car Gen3 (64bit)"
@@ -2,7 +2,7 @@ if ARCH_ROCKCHIP
config ROCKCHIP_RK3036
bool "Support Rockchip RK3036"
- select CPU_V7
+ select CPU_V7A
select SUPPORT_SPL
select SPL
imply USB_FUNCTION_ROCKUSB
@@ -15,7 +15,7 @@ config ROCKCHIP_RK3036
config ROCKCHIP_RK3128
bool "Support Rockchip RK3128"
- select CPU_V7
+ select CPU_V7A
help
The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
including NEON and GPU, Mali-400 graphics, several DDR3 options
@@ -24,7 +24,7 @@ config ROCKCHIP_RK3128
config ROCKCHIP_RK3188
bool "Support Rockchip RK3188"
- select CPU_V7
+ select CPU_V7A
select SPL_BOARD_INIT if SPL
select SUPPORT_SPL
select SPL
@@ -46,7 +46,7 @@ config ROCKCHIP_RK3188
config ROCKCHIP_RK322X
bool "Support Rockchip RK3228/RK3229"
- select CPU_V7
+ select CPU_V7A
select SUPPORT_SPL
select SPL
select ROCKCHIP_BROM_HELPER
@@ -59,7 +59,7 @@ config ROCKCHIP_RK322X
config ROCKCHIP_RK3288
bool "Support Rockchip RK3288"
- select CPU_V7
+ select CPU_V7A
select SPL_BOARD_INIT if SPL
select SUPPORT_SPL
select SPL
@@ -152,7 +152,7 @@ config ROCKCHIP_RK3399
config ROCKCHIP_RV1108
bool "Support Rockchip RV1108"
- select CPU_V7
+ select CPU_V7A
help
The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
and a DSP.
@@ -24,7 +24,7 @@ config SYS_SOC
config TARGET_STM32MP1
bool "Support stm32mp1xx"
- select CPU_V7
+ select CPU_V7A
select PINCTRL_STM32
select STM32_RESET
select SYSRESET_SYSCON
@@ -136,7 +136,7 @@ choice
config MACH_SUN4I
bool "sun4i (Allwinner A10)"
- select CPU_V7
+ select CPU_V7A
select ARM_CORTEX_CPU_IS_UP
select DRAM_SUN4I
select SUNXI_GEN_SUN4I
@@ -144,7 +144,7 @@ config MACH_SUN4I
config MACH_SUN5I
bool "sun5i (Allwinner A13)"
- select CPU_V7
+ select CPU_V7A
select ARM_CORTEX_CPU_IS_UP
select DRAM_SUN4I
select SUNXI_GEN_SUN4I
@@ -153,7 +153,7 @@ config MACH_SUN5I
config MACH_SUN6I
bool "sun6i (Allwinner A31)"
- select CPU_V7
+ select CPU_V7A
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select ARCH_SUPPORT_PSCI
@@ -166,7 +166,7 @@ config MACH_SUN6I
config MACH_SUN7I
bool "sun7i (Allwinner A20)"
- select CPU_V7
+ select CPU_V7A
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select ARCH_SUPPORT_PSCI
@@ -177,7 +177,7 @@ config MACH_SUN7I
config MACH_SUN8I_A23
bool "sun8i (Allwinner A23)"
- select CPU_V7
+ select CPU_V7A
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select ARCH_SUPPORT_PSCI
@@ -189,7 +189,7 @@ config MACH_SUN8I_A23
config MACH_SUN8I_A33
bool "sun8i (Allwinner A33)"
- select CPU_V7
+ select CPU_V7A
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select ARCH_SUPPORT_PSCI
@@ -201,7 +201,7 @@ config MACH_SUN8I_A33
config MACH_SUN8I_A83T
bool "sun8i (Allwinner A83T)"
- select CPU_V7
+ select CPU_V7A
select DRAM_SUN8I_A83T
select SUNXI_GEN_SUN6I
select MMC_SUNXI_HAS_NEW_MODE
@@ -209,7 +209,7 @@ config MACH_SUN8I_A83T
config MACH_SUN8I_H3
bool "sun8i (Allwinner H3)"
- select CPU_V7
+ select CPU_V7A
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select ARCH_SUPPORT_PSCI
@@ -218,7 +218,7 @@ config MACH_SUN8I_H3
config MACH_SUN8I_R40
bool "sun8i (Allwinner R40)"
- select CPU_V7
+ select CPU_V7A
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select ARCH_SUPPORT_PSCI
@@ -229,7 +229,7 @@ config MACH_SUN8I_R40
config MACH_SUN8I_V3S
bool "sun8i (Allwinner V3s)"
- select CPU_V7
+ select CPU_V7A
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select ARCH_SUPPORT_PSCI
@@ -241,7 +241,7 @@ config MACH_SUN8I_V3S
config MACH_SUN9I
bool "sun9i (Allwinner A80)"
- select CPU_V7
+ select CPU_V7A
select DRAM_SUN9I
select SUN6I_PRCM
select SUNXI_HIGH_SRAM
@@ -49,7 +49,7 @@ config TEGRA_NO_BPMP
config TEGRA_ARMV7_COMMON
bool "Tegra 32-bit common options"
- select CPU_V7
+ select CPU_V7A
select SPL
select SPL_BOARD_INIT if SPL
select SUPPORT_SPL
@@ -5,7 +5,7 @@ config SYS_CONFIG_NAME
config ARCH_UNIPHIER_32BIT
bool
- select CPU_V7
+ select CPU_V7A
select CPU_V7_HAS_NONSEC
select ARMV7_NONSEC
select ARCH_SUPPORT_PSCI
@@ -33,5 +33,5 @@ obj-y += dram/
obj-$(CONFIG_DEBUG_UART_UNIPHIER) += debug-uart/
-obj-$(CONFIG_CPU_V7) += arm32/
+obj-$(CONFIG_CPU_V7A) += arm32/
obj-$(CONFIG_ARM64) += arm64/
@@ -1103,7 +1103,7 @@ config BOOTP_PXE_CLIENTARCH
config BOOTP_VCI_STRING
string
depends on CMD_BOOTP
- default "U-Boot.armv7" if CPU_V7 || CPU_V7M
+ default "U-Boot.armv7" if CPU_V7A || CPU_V7M
default "U-Boot.armv8" if ARM64
default "U-Boot.arm" if ARM
default "U-Boot"
@@ -20,7 +20,7 @@
#include <dm.h>
#include <serial.h>
-#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V7)
+#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V7A)
/*
* ARMV6 & ARMV7
*/