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[U-Boot,PATCHv1,3/7] board: ge: bx50v3: fix display support for b{46}50v3

Message ID 20180425145704.30841-4-sebastian.reichel@collabora.co.uk
State Accepted
Commit 70168a736687f09de00ad965593041232c2f3db1
Delegated to: Stefano Babic
Headers show
Series Merge B850v3, B650v3 and B450v3 targets | expand

Commit Message

Sebastian Reichel April 25, 2018, 2:57 p.m. UTC 
From: Ian Ray <ian.ray@ge.com>

Enable Video PLL to fix non-working display support for Bx50v3
internal displays.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
---
 board/ge/bx50v3/bx50v3.c | 2 ++
 1 file changed, 2 insertions(+)
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Patch

diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c
index 5e84f2e630e3..3c8689682141 100644
--- a/board/ge/bx50v3/bx50v3.c
+++ b/board/ge/bx50v3/bx50v3.c
@@ -493,6 +493,8 @@  static void setup_display_bx50v3(void)
 	struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
 	struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
 
+	enable_videopll();
+
 	/* When a reset/reboot is performed the display power needs to be turned
 	 * off for atleast 500ms. The boot time is ~300ms, we need to wait for
 	 * an additional 200ms here. Unfortunately we use external PMIC for