Message ID | 1524699938-6764-4-git-send-email-mjc@sifive.com |
---|---|
State | New |
Headers | show
Return-Path: <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org> X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=<UNKNOWN>) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=sifive.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=sifive.com header.i=@sifive.com header.b="fhwhjXx5"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 40WcNm6TFvz9rxs for <incoming@patchwork.ozlabs.org>; Thu, 26 Apr 2018 09:49:12 +1000 (AEST) Received: from localhost ([::1]:39552 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>) id 1fBU9u-0005JG-S2 for incoming@patchwork.ozlabs.org; Wed, 25 Apr 2018 19:49:10 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46289) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from <mjc@sifive.com>) id 1fBU89-0004VU-UD for qemu-devel@nongnu.org; Wed, 25 Apr 2018 19:47:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from <mjc@sifive.com>) id 1fBU86-0004me-QP for qemu-devel@nongnu.org; Wed, 25 Apr 2018 19:47:21 -0400 Received: from mail-pf0-x241.google.com ([2607:f8b0:400e:c00::241]:44915) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from <mjc@sifive.com>) id 1fBU86-0004mD-KG for qemu-devel@nongnu.org; Wed, 25 Apr 2018 19:47:18 -0400 Received: by mail-pf0-x241.google.com with SMTP id q22so1642890pff.11 for <qemu-devel@nongnu.org>; Wed, 25 Apr 2018 16:47:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=E326pDKrBIQBEHS9rOZFu3VrI060+Eq+z01DqLl6GQE=; b=fhwhjXx5s6/CZemMaGkrS/L+uMxY8feylEljuIO5pivdv7Fo6AtzMAK3JGmBQ14lDs mUE0vt0GJxLAnQ9JL4OqKQfCnsnPZ1WblmtC4g9Bck0CjfYn2YjR5R8gvvWniN2Om/4k Old9lUIgu0DeXm0iBhMKi48CxsY9OnwF4NBQDVLop1Iiqd/epdWsZCD3Q/JAeaFl6nEQ GBMQhPgvgM7mTC7v1rV2r5SbCNQJvL77c9D1cdWmwBZNCN+9hVrp24xarojIO/vA/dWE 2jfzd7K0BN7XE8pzNXk+btQqd4qdVyYToR2nmbcX5LCNCs0B01t1OyBcZJAMmDJVMyxx DTAQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=E326pDKrBIQBEHS9rOZFu3VrI060+Eq+z01DqLl6GQE=; b=SdUT+9Gj3lhAH/4g5au9CYRcCOfvzR0f/mppxfA+m79cHXkmrCXa8ubG+9YEPFWqF3 hhj5YSpAkzCXoNceBAmqb72rrnyNhCxP/Xx/rZts8d21Lvhm0geS96egz6eGOXX5378/ hgVZIMbNFh+QVVK8jFu0DawIg5s3k3iaRFo86zf6HCcmnWsFCgdM3ima+883kuxtoogU o1I/46CwwB+Kwop3ZWPfCLPBcVgqtUG4wys3iVIhkQXa+5h03uFjC/EL1Qv/ESGnxQ9q upR+kqxpmg2rEoPhrxBdXT1OzNwAKHV/yPO0o1xl4a1LZCdTswPKpl9S0u2FIpfenrPW mY0Q== X-Gm-Message-State: ALQs6tC727Gtaz7ER9dAJHOdjZKifk81CgBDe/SrIMsAsyjLbjABB9fF /Z9geGKrHizl0J8ZNlbBibzDyaP/aFI= X-Google-Smtp-Source: AIpwx4+FxPXt+0mToAB3AV1T8XK0oPhN98aqzh/AbuyyNvJsc+/zln88t/f6Eo2faTN8ERfV3DSh2w== X-Received: by 10.98.129.5 with SMTP id t5mr17581497pfd.215.1524700037552; Wed, 25 Apr 2018 16:47:17 -0700 (PDT) Received: from localhost.localdomain (122-58-167-38-fibre.bb.spark.co.nz. [122.58.167.38]) by smtp.gmail.com with ESMTPSA id e10sm29577549pfn.67.2018.04.25.16.47.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 25 Apr 2018 16:47:17 -0700 (PDT) From: Michael Clark <mjc@sifive.com> To: qemu-devel@nongnu.org Date: Thu, 26 Apr 2018 11:45:06 +1200 Message-Id: <1524699938-6764-4-git-send-email-mjc@sifive.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1524699938-6764-1-git-send-email-mjc@sifive.com> References: <1524699938-6764-1-git-send-email-mjc@sifive.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::241 Subject: [Qemu-devel] [PATCH v8 03/35] RISC-V: Use ROM base address and size from memmap X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel/> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Cc: patches@groups.riscv.org, Michael Clark <mjc@sifive.com>, Palmer Dabbelt <palmer@sifive.com>, Sagar Karandikar <sagark@eecs.berkeley.edu>, Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org> |
Series |
QEMU 2.13 Privileged ISA emulation updates
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expand
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diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index dc74fd6..ac0106e 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -341,11 +341,11 @@ static void riscv_virt_board_init(MachineState *machine) }; /* copy in the reset vector */ - copy_le32_to_phys(ROM_BASE, reset_vec, sizeof(reset_vec)); + copy_le32_to_phys(memmap[VIRT_MROM].base, reset_vec, sizeof(reset_vec)); /* copy in the device tree */ qemu_fdt_dumpdtb(s->fdt, s->fdt_size); - cpu_physical_memory_write(ROM_BASE + sizeof(reset_vec), + cpu_physical_memory_write(memmap[VIRT_MROM].base + sizeof(reset_vec), s->fdt, s->fdt_size); /* create PLIC hart topology configuration string */ diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index 2fbe808..655e85d 100644 --- a/include/hw/riscv/virt.h +++ b/include/hw/riscv/virt.h @@ -23,8 +23,6 @@ #define VIRT(obj) \ OBJECT_CHECK(RISCVVirtState, (obj), TYPE_RISCV_VIRT_BOARD) -enum { ROM_BASE = 0x1000 }; - typedef struct { /*< private >*/ SysBusDevice parent_obj;