Patchwork [U-Boot,3/6] Davinci: ea20: Add NAND support

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Submitter Stefano Babic
Date April 9, 2011, 6:05 p.m.
Message ID <1302372335-30232-3-git-send-email-sbabic@denx.de>
Download mbox | patch
Permalink /patch/90477/
State Accepted
Commit 17a8904b2791cdb495370c0e21c95f4ddd4fe877
Delegated to: Sandeep Paulraj
Headers show

Comments

Stefano Babic - April 9, 2011, 6:05 p.m.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Sandeep Paulraj <s-paulraj@ti.com>
CC: Scott Wood <scottwood@freescale.com>
---
 board/davinci/ea20/ea20.c |   35 ++++++++++++++++++-----------------
 include/configs/ea20.h    |   20 +++++++++++++++++---
 2 files changed, 35 insertions(+), 20 deletions(-)
Ben Gardiner - April 11, 2011, 1:05 p.m.
On Sat, Apr 9, 2011 at 2:05 PM, Stefano Babic <sbabic@denx.de> wrote:
> Signed-off-by: Stefano Babic <sbabic@denx.de>
> CC: Sandeep Paulraj <s-paulraj@ti.com>
> CC: Scott Wood <scottwood@freescale.com>

> [...]
> @@ -143,20 +144,20 @@ int board_init(void)
>        irq_init();
>  #endif
>
> -#ifdef CONFIG_NAND_DAVINCI
>        /*
>         * NAND CS setup - cycle counts based on da850evm NAND timings in the
>         * Linux kernel @ 25MHz EMIFA
>         */
> +#ifdef CONFIG_NAND_DAVINCI
>        writel((DAVINCI_ABCR_WSETUP(0) |
> -               DAVINCI_ABCR_WSTROBE(0) |
> +               DAVINCI_ABCR_WSTROBE(1) |

If WSTROBE is modified then the timings are no longer solely based on
the NAND timings in arch/arm/mach-davinci/board-da850-evm.c in the
Linux kernel. Can you add an amendment to the comment describing the
motivation for the extra WSTROBE cycle?

> [...]

Best Regards,
Ben Gardiner

---
Nanometrics Inc.
http://www.nanometrics.ca
Stefano Babic - April 12, 2011, 7:29 a.m.
On 04/11/2011 03:05 PM, Ben Gardiner wrote:

Hi Ben,

> 
>> [...]
>> @@ -143,20 +144,20 @@ int board_init(void)
>>        irq_init();
>>  #endif
>>
>> -#ifdef CONFIG_NAND_DAVINCI
>>        /*
>>         * NAND CS setup - cycle counts based on da850evm NAND timings in the
>>         * Linux kernel @ 25MHz EMIFA
>>         */
>> +#ifdef CONFIG_NAND_DAVINCI
>>        writel((DAVINCI_ABCR_WSETUP(0) |
>> -               DAVINCI_ABCR_WSTROBE(0) |
>> +               DAVINCI_ABCR_WSTROBE(1) |
> 
> If WSTROBE is modified then the timings are no longer solely based on
> the NAND timings in arch/arm/mach-davinci/board-da850-evm.c in the
> Linux kernel. Can you add an amendment to the comment describing the
> motivation for the extra WSTROBE cycle?

Really this board will not use at all the board-da850-evm.c, but (no
patches are yet pushed) it will have its own board configuration file
(something like arch/arm/mach-davinci/ea20.c). I understand that if no
timing structure is set into the davinci_nand_pdata in Linux, values set
by the bootloader are not overwritten (this is the case for this board
at the moment). Regarding setting the WSTROBE, I understood from manual
(EMIFA) that WSTROBE and RSTROBE cannot be set to zero if the EMA_WAIT
pin is used, as on this board.

Best regards,
Stefano
Ben Gardiner - April 12, 2011, 4:09 p.m.
On Tue, Apr 12, 2011 at 3:29 AM, Stefano Babic <sbabic@denx.de> wrote:
> On 04/11/2011 03:05 PM, Ben Gardiner wrote:
>>
>>> [...]
>>> @@ -143,20 +144,20 @@ int board_init(void)
>>>        irq_init();
>>>  #endif
>>>
>>> -#ifdef CONFIG_NAND_DAVINCI
>>>        /*
>>>         * NAND CS setup - cycle counts based on da850evm NAND timings in the
>>>         * Linux kernel @ 25MHz EMIFA
>>>         */
>>> +#ifdef CONFIG_NAND_DAVINCI
>>>        writel((DAVINCI_ABCR_WSETUP(0) |
>>> -               DAVINCI_ABCR_WSTROBE(0) |
>>> +               DAVINCI_ABCR_WSTROBE(1) |
>>
>> If WSTROBE is modified then the timings are no longer solely based on
>> the NAND timings in arch/arm/mach-davinci/board-da850-evm.c in the
>> Linux kernel. Can you add an amendment to the comment describing the
>> motivation for the extra WSTROBE cycle?
>
> Really this board will not use at all the board-da850-evm.c, but (no
> patches are yet pushed) it will have its own board configuration file
> (something like arch/arm/mach-davinci/ea20.c). I understand that if no

Ok. I understand that the ea20 is not the da850evm. I think that if
the comment says "based on da850evm NAND timings" then any change from
those timings should also be noted.

> [...]
> Regarding setting the WSTROBE, I understood from manual
> (EMIFA) that WSTROBE and RSTROBE cannot be set to zero if the EMA_WAIT
> pin is used, as on this board.

Yes, you're absolutely right:

"
Finally, a restriction is placed on the strobe period timing
parameters when operating in Extended Wait
mode. Specifically, the W_STROBE and R_STROBE fields must not be set
to 0 for proper operation.
" [1]

Thanks, Stefano! -- I got it wrong in commit
a3f88293ddd13facd734769c1664d35ab4ed681f da850evm: setup the NAND
flash timings

I just re-inspected the settings assigned by
davinci_aemif_setup_timing() in arch/arm/mach-davinci/aemif.c of the
Linux kernel and they are:

wsetup=0
wstrobe=1	
whold=0
rsetup=0
rstrobe=1
rhold=0
ta=1

So 'WSTROBE'(0) and 'TA(0)' need to be fixed in
board/davinci/da8xxevm/da850evm.c. Patch coming.

I think this means you should also update to TA(1) in your patch --
although it really depends on what the ea20 NAND chip timings are.
	
Best Regards,
Ben Gardiner

[1] http://www.ti.com/litv/pdf/sprufl6f

---
Nanometrics Inc.
http://www.nanometrics.ca

Patch

diff --git a/board/davinci/ea20/ea20.c b/board/davinci/ea20/ea20.c
index d1b56bf..f43d644 100644
--- a/board/davinci/ea20/ea20.c
+++ b/board/davinci/ea20/ea20.c
@@ -74,20 +74,21 @@  static const struct pinmux_config emac_pins[] = {
 
 #ifdef CONFIG_NAND_DAVINCI
 const struct pinmux_config nand_pins[] = {
-	{ pinmux(7), 1, 1 },
-	{ pinmux(7), 1, 2 },
-	{ pinmux(7), 1, 4 },
-	{ pinmux(7), 1, 5 },
-	{ pinmux(9), 1, 0 },
-	{ pinmux(9), 1, 1 },
-	{ pinmux(9), 1, 2 },
-	{ pinmux(9), 1, 3 },
-	{ pinmux(9), 1, 4 },
-	{ pinmux(9), 1, 5 },
-	{ pinmux(9), 1, 6 },
-	{ pinmux(9), 1, 7 },
-	{ pinmux(12), 1, 5 },
-	{ pinmux(12), 1, 6 }
+	{ pinmux(7), 1, 0},	/* CS2 */
+	{ pinmux(7), 0, 1},	/* CS3  in three state*/
+	{ pinmux(7), 1, 4 },	/* EMA_WE */
+	{ pinmux(7), 1, 5 },	/* EMA_OE */
+	{ pinmux(9), 1, 0 },	/* EMA_D[7] */
+	{ pinmux(9), 1, 1 },	/* EMA_D[6] */
+	{ pinmux(9), 1, 2 },	/* EMA_D[5] */
+	{ pinmux(9), 1, 3 },	/* EMA_D[4] */
+	{ pinmux(9), 1, 4 },	/* EMA_D[3] */
+	{ pinmux(9), 1, 5 },	/* EMA_D[2] */
+	{ pinmux(9), 1, 6 },	/* EMA_D[1] */
+	{ pinmux(9), 1, 7 },	/* EMA_D[0] */
+	{ pinmux(12), 1, 5 },	/* EMA_A[2] */
+	{ pinmux(12), 1, 6 },	/* EMA_A[1] */
+	{ pinmux(6), 1, 0 }	/* EMA_CLK */
 };
 #endif
 
@@ -143,20 +144,20 @@  int board_init(void)
 	irq_init();
 #endif
 
-#ifdef CONFIG_NAND_DAVINCI
 	/*
 	 * NAND CS setup - cycle counts based on da850evm NAND timings in the
 	 * Linux kernel @ 25MHz EMIFA
 	 */
+#ifdef CONFIG_NAND_DAVINCI
 	writel((DAVINCI_ABCR_WSETUP(0) |
-		DAVINCI_ABCR_WSTROBE(0) |
+		DAVINCI_ABCR_WSTROBE(1) |
 		DAVINCI_ABCR_WHOLD(0) |
 		DAVINCI_ABCR_RSETUP(0) |
 		DAVINCI_ABCR_RSTROBE(1) |
 		DAVINCI_ABCR_RHOLD(0) |
 		DAVINCI_ABCR_TA(0) |
 		DAVINCI_ABCR_ASIZE_8BIT),
-	       &davinci_emif_regs->ab2cr); /* CS3 */
+	       &davinci_emif_regs->ab1cr); /* CS2 */
 #endif
 
 	/* arch number of the board */
diff --git a/include/configs/ea20.h b/include/configs/ea20.h
index 601990a..2a7f531 100644
--- a/include/configs/ea20.h
+++ b/include/configs/ea20.h
@@ -28,6 +28,7 @@ 
  */
 #define CONFIG_DRIVER_TI_EMAC
 #define CONFIG_USE_SPIFLASH
+#define	CONFIG_SYS_USE_NAND
 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
 
 /*
@@ -101,7 +102,7 @@ 
 #undef CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_IS_IN_SPI_FLASH
 #define CONFIG_ENV_SIZE			(8 << 10)
-#define CONFIG_ENV_OFFSET		(256 << 10)
+#define CONFIG_ENV_OFFSET		0x80000
 #define CONFIG_ENV_SECT_SIZE		(64 << 10)
 #define CONFIG_SYS_NO_FLASH
 #endif
@@ -153,7 +154,8 @@ 
 #undef CONFIG_CMD_PING
 #endif
 
-#ifdef CONFIG_USE_NAND
+/* NAND Setup */
+#ifdef CONFIG_SYS_USE_NAND
 #undef CONFIG_CMD_FLASH
 #undef CONFIG_CMD_IMLS
 #define CONFIG_CMD_NAND
@@ -165,8 +167,20 @@ 
 #define CONFIG_RBTREE
 #define CONFIG_CMD_UBI
 #define CONFIG_CMD_UBIFS
+
+#define CONFIG_NAND_DAVINCI
+#define	CONFIG_SYS_NAND_PAGE_2K
+#define CONFIG_SYS_NAND_CS		2
+#define CONFIG_SYS_NAND_BASE		DAVINCI_ASYNC_EMIF_DATA_CE2_BASE
+#undef CONFIG_SYS_NAND_HW_ECC
+#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
+#define	CONFIG_SYS_NAND_USE_FLASH_BBT
+#define CONFIG_SYS_MAX_NAND_DEVICE	1 /* Max number of NAND devices */
+#define NAND_MAX_CHIPS			1
+#define CONFIG_SYS_64BIT_VSPRINTF	/* needed for nand_util.c */
 #endif
 
+/* SPI Flash */
 #ifdef CONFIG_USE_SPIFLASH
 #undef CONFIG_CMD_IMLS
 #undef CONFIG_CMD_FLASH
@@ -175,7 +189,7 @@ 
 #define CONFIG_CMD_SAVEENV
 #endif
 
-#if !defined(CONFIG_USE_NAND) && \
+#if !defined(CONFIG_SYS_USE_NAND) && \
 	!defined(CONFIG_USE_NOR) && \
 	!defined(CONFIG_USE_SPIFLASH)
 #define CONFIG_ENV_IS_NOWHERE