diff mbox series

spapr: fix entry point for secondary CPUs

Message ID 20180425093424.18713-1-clg@kaod.org
State New
Headers show
Series spapr: fix entry point for secondary CPUs | expand

Commit Message

Cédric Le Goater April 25, 2018, 9:34 a.m. UTC
Secondary CPUs do not start at SPAPR_ENTRY_POINT but at an address
given by the guest OS.

Fixes commit c79128c14c20 ("spapr: Make a helper to set up cpu entry
point state")

Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
 hw/ppc/spapr_cpu_core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

David Gibson April 26, 2018, 1:19 a.m. UTC | #1
On Wed, Apr 25, 2018 at 11:34:24AM +0200, Cédric Le Goater wrote:
> Secondary CPUs do not start at SPAPR_ENTRY_POINT but at an address
> given by the guest OS.
> 
> Fixes commit c79128c14c20 ("spapr: Make a helper to set up cpu entry
> point state")
> 
> Signed-off-by: Cédric Le Goater <clg@kaod.org>

Oops.  Since I haven't send that patch upstream yet, I've folded this
fix in rather than including it as a separate patch.

Note that ppc-for-<whatever> are rebasing trees, so commit ids in
there aren't stable.
Cédric Le Goater April 26, 2018, 7:18 a.m. UTC | #2
On 04/26/2018 03:19 AM, David Gibson wrote:
> On Wed, Apr 25, 2018 at 11:34:24AM +0200, Cédric Le Goater wrote:
>> Secondary CPUs do not start at SPAPR_ENTRY_POINT but at an address
>> given by the guest OS.
>>
>> Fixes commit c79128c14c20 ("spapr: Make a helper to set up cpu entry
>> point state")
>>
>> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> 
> Oops.  Since I haven't send that patch upstream yet, I've folded this
> fix in rather than including it as a separate patch.

OK. 

> Note that ppc-for-<whatever> are rebasing trees, so commit ids in
> there aren't stable.

yes. I usually track these at the beginning of the dev cycle. So I 
have rebased all my QEMU development trees on ppc-for-2.13 yesterday 
and found a couple of issues in TCG hot(un)plug, the entry point and 
the radix LPCR setting.

C.
diff mbox series

Patch

diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index 326b35d6ed23..f3e9b879b251 100644
--- a/hw/ppc/spapr_cpu_core.c
+++ b/hw/ppc/spapr_cpu_core.c
@@ -76,7 +76,7 @@  void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip, target_ulong r
     PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
     CPUPPCState *env = &cpu->env;
 
-    env->nip = SPAPR_ENTRY_POINT;
+    env->nip = nip;
     env->gpr[3] = r3;
     CPU(cpu)->halted = 0;
     /* Enable Power-saving mode Exit Cause exceptions */