Message ID | 20180425091439.12695-2-lokeshvutla@ti.com |
---|---|
State | Superseded |
Headers | show |
Series | arm: Introduce v7R support | expand |
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 7e2695761e..937f7051fe 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -73,9 +73,11 @@ switch_to_hypervisor_ret: bic r0, #CR_V @ V = 0 mcr p15, 0, r0, c1, c0, 0 @ Write CP15 SCTLR Register +#ifdef CONFIG_HAS_VBAR /* Set vector address in CP15 VBAR register */ ldr r0, =_start mcr p15, 0, r0, c12, c0, 0 @Set VBAR +#endif #endif /* the mask ROM code should have PLL and others stable */