diff mbox series

[7/9] target/arm: Implement FCVT (scalar, fixed-point) for fp16

Message ID 20180425012300.14698-8-richard.henderson@linaro.org
State New
Headers show
Series target/arm: Fixups for ARM_FEATURE_V8_FP16 | expand

Commit Message

Richard Henderson April 25, 2018, 1:22 a.m. UTC
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/translate-a64.c | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

Comments

Alex Bennée May 1, 2018, 10:57 a.m. UTC | #1
Richard Henderson <richard.henderson@linaro.org> writes:

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

> ---
>  target/arm/translate-a64.c | 17 +++++++++++++++--
>  1 file changed, 15 insertions(+), 2 deletions(-)
>
> diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
> index 4f6317aa0f..794ede7222 100644
> --- a/target/arm/translate-a64.c
> +++ b/target/arm/translate-a64.c
> @@ -5372,8 +5372,7 @@ static void disas_fp_fixed_conv(DisasContext *s, uint32_t insn)
>      bool sf = extract32(insn, 31, 1);
>      bool itof;
>
> -    if (sbit || (type > 1)
> -        || (!sf && scale < 32)) {
> +    if (sbit || (!sf && scale < 32)) {
>          unallocated_encoding(s);
>          return;
>      }
> @@ -5392,6 +5391,20 @@ static void disas_fp_fixed_conv(DisasContext *s, uint32_t insn)
>          return;
>      }
>
> +    switch (type) {
> +    case 0: /* float32 */
> +    case 1: /* float64 */
> +        break;
> +    case 3: /* float16 */
> +        if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) {
> +            break;
> +        }
> +        /* fallthru */
> +    default:
> +        unallocated_encoding(s);
> +        return;
> +    }
> +
>      if (!fp_access_check(s)) {
>          return;
>      }


--
Alex Bennée
diff mbox series

Patch

diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 4f6317aa0f..794ede7222 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -5372,8 +5372,7 @@  static void disas_fp_fixed_conv(DisasContext *s, uint32_t insn)
     bool sf = extract32(insn, 31, 1);
     bool itof;
 
-    if (sbit || (type > 1)
-        || (!sf && scale < 32)) {
+    if (sbit || (!sf && scale < 32)) {
         unallocated_encoding(s);
         return;
     }
@@ -5392,6 +5391,20 @@  static void disas_fp_fixed_conv(DisasContext *s, uint32_t insn)
         return;
     }
 
+    switch (type) {
+    case 0: /* float32 */
+    case 1: /* float64 */
+        break;
+    case 3: /* float16 */
+        if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) {
+            break;
+        }
+        /* fallthru */
+    default:
+        unallocated_encoding(s);
+        return;
+    }
+
     if (!fp_access_check(s)) {
         return;
     }