From patchwork Fri Apr 8 12:47:23 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Valentin Longchamp X-Patchwork-Id: 90319 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 60CF8B6F76 for ; Fri, 8 Apr 2011 22:58:52 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DE075280A6; Fri, 8 Apr 2011 14:58:45 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id WFZNwO0Pofsc; Fri, 8 Apr 2011 14:58:45 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4984A280A7; Fri, 8 Apr 2011 14:58:07 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5271C28084 for ; Fri, 8 Apr 2011 14:58:04 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 22vJS-fQhj5F for ; Fri, 8 Apr 2011 14:58:03 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail.ch.keymile.com (mail.ch.keymile.com [193.17.201.103]) by theia.denx.de (Postfix) with SMTP id 177CE28086 for ; Fri, 8 Apr 2011 14:58:00 +0200 (CEST) Received: from SRVCHBER1212.ch.keymile.net ([172.31.32.9]) by eSafe SMTP Relay 1297237168; Fri, 08 Apr 2011 14:36:32 +0100 Received: from localhost.localdomain ([172.31.32.134]) by SRVCHBER1212.ch.keymile.net with Microsoft SMTPSVC(6.0.3790.4675); Fri, 8 Apr 2011 14:47:56 +0200 From: Valentin Longchamp To: u-boot@lists.denx.de Date: Fri, 8 Apr 2011 14:47:23 +0200 Message-Id: X-Mailer: git-send-email 1.7.0.5 In-Reply-To: In-Reply-To: References: References: X-OriginalArrivalTime: 08 Apr 2011 12:47:56.0525 (UTC) FILETIME=[2F0641D0:01CBF5EB] X-ESAFE-STATUS: Mail allowed X-ESAFE-DETAILS: Cc: Valentin Longchamp , Wolfgang@theia.denx.de, holger.brunck@keymile.com, Andreas Huber , "Huber, Andreas" , hs@denx.de Subject: [U-Boot] [PATCH] powerpc/km82xx: add DIP switch detection X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Huber, Andreas This reads the DIP switch register in the BFTICU (0x40000089). If 'Full reset' or 'DB erase' is selected, 'actual_bank' is set to 0. This loads the Bootloader application who does the erase stuff. To access the register a struct for the bfticu I/O map was added to common.h. Signed-off-by: Andreas Huber Signed-off-by: Holger Brunck Acked-by: Heiko Schocher cc: Wolfgang Denk cc: Detlev Zundel cc: Valentin Longchamp Signed-off-by: Valentin Longchamp --- board/keymile/common/common.h | 79 +++++++++++++++++++++++++++++++++++++++++ board/keymile/mgcoge/mgcoge.c | 12 ++++++ 2 files changed, 91 insertions(+), 0 deletions(-) diff --git a/board/keymile/common/common.h b/board/keymile/common/common.h index 099de98..cdc35b6 100644 --- a/board/keymile/common/common.h +++ b/board/keymile/common/common.h @@ -39,6 +39,85 @@ struct km_bec_fpga { unsigned char pgy_eth; }; +#define BFTICU_DIPSWITCH_MASK 0x0f + +/* + * BFTICU FPGA iomap + * BFTICU is used on mgcoge and mgocge3ne + */ +struct bfticu_iomap { + u8 xi_ena; /* General defect enable */ + u8 pack1[3]; + u8 en_csn; + u8 pack2; + u8 safe_mem; + u8 pack3; + u8 id; + u8 pack4; + u8 rev; + u8 build; + u8 p_frc; + u8 p_msk; + u8 pack5[2]; + u8 xg_int; + u8 pack6[15]; + u8 s_conf; + u8 pack7; + u8 dmx_conf12; + u8 pack8; + u8 s_clkslv; + u8 pack9[11]; + u8 d_conf; + u8 d_mask_ca; + u8 d_pll_del; + u8 pack10[16]; + u8 t_conf_ca; + u8 t_mask_ca; + u8 pack11[13]; + u8 m_def0; + u8 m_def1; + u8 m_def2; + u8 m_def3; + u8 m_def4; + u8 m_def5; + u8 m_def_trap0; + u8 m_def_trap1; + u8 m_def_trap2; + u8 m_def_trap3; + u8 m_def_trap4; + u8 m_def_trap5; + u8 m_mask_def0; + u8 m_mask_def1; + u8 m_mask_def2; + u8 m_mask_def3; + u8 m_mask_def4; + u8 m_mask_def5; + u8 m_def_mask0; + u8 m_def_mask1; + u8 m_def_mask2; + u8 m_def_mask3; + u8 m_def_mask4; + u8 m_def_mask5; + u8 m_def_pri; + u8 pack12[11]; + u8 hw_status; + u8 pack13; + u8 hw_control1; + u8 hw_control2; + u8 hw_control3; + u8 pack14[7]; + u8 led_on; /* Leds */ + u8 pack15; + u8 sfp_control; /* SFP modules */ + u8 pack16; + u8 alarm_control; /* Alarm output */ + u8 pack17; + u8 icps; /* ICN clock pulse shaping */ + u8 mswitch; /* Read mode switch */ + u8 pack18[6]; + u8 pb_dbug; +}; + #if !defined(CONFIG_PIGGY_MAC_ADRESS_OFFSET) #define CONFIG_PIGGY_MAC_ADRESS_OFFSET 0 #endif diff --git a/board/keymile/mgcoge/mgcoge.c b/board/keymile/mgcoge/mgcoge.c index 340016b..11a0f79 100644 --- a/board/keymile/mgcoge/mgcoge.c +++ b/board/keymile/mgcoge/mgcoge.c @@ -315,6 +315,18 @@ int board_early_init_r(void) int last_stage_init(void) { + struct bfticu_iomap *base = + (struct bfticu_iomap *)CONFIG_SYS_FPGA_BASE; + u8 dip_switch; + + dip_switch = in_8(&base->mswitch); + dip_switch &= BFTICU_DIPSWITCH_MASK; + /* dip switch 'full reset' or 'db erase' */ + if (dip_switch & 0x1 || dip_switch & 0x2) { + /* start bootloader */ + puts("DIP: Enabled\n"); + setenv("actual_bank", "0"); + } set_km_env(); return 0; }