From patchwork Mon Apr 23 16:43:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 903129 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=kvm-ppc-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=kaod.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40VDq13pTNz9s06 for ; Tue, 24 Apr 2018 04:03:41 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932319AbeDWSDk (ORCPT ); Mon, 23 Apr 2018 14:03:40 -0400 Received: from 6.mo2.mail-out.ovh.net ([87.98.165.38]:33895 "EHLO 6.mo2.mail-out.ovh.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932109AbeDWSDk (ORCPT ); Mon, 23 Apr 2018 14:03:40 -0400 X-Greylist: delayed 4780 seconds by postgrey-1.27 at vger.kernel.org; Mon, 23 Apr 2018 14:03:39 EDT Received: from player737.ha.ovh.net (unknown [10.109.120.71]) by mo2.mail-out.ovh.net (Postfix) with ESMTP id 3A820121A30 for ; Mon, 23 Apr 2018 18:43:58 +0200 (CEST) Received: from zorba.kaod.org.com (LFbn-TOU-1-49-10.w86-201.abo.wanadoo.fr [86.201.141.10]) (Authenticated sender: clg@kaod.org) by player737.ha.ovh.net (Postfix) with ESMTPSA id E97EDE00BB; Mon, 23 Apr 2018 18:43:51 +0200 (CEST) From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: kvm-ppc@vger.kernel.org, kvm@vger.kernel.org Cc: Paul Mackerras , David Gibson , Benjamin Herrenschmidt , =?utf-8?q?C=C3=A9dric_Le_Goater?= Subject: [RFC PATCH 01/16] powerpc/xive: export flags for the XIVE native exploitation mode hcalls Date: Mon, 23 Apr 2018 18:43:26 +0200 Message-Id: <20180423164341.15767-2-clg@kaod.org> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20180423164341.15767-1-clg@kaod.org> References: <20180423164341.15767-1-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 958703772596866007 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgedtgedrkeeggddutdegucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddm Sender: kvm-ppc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm-ppc@vger.kernel.org These flags are shared between Linux/KVM implementing the hypervisor calls for the XIVE native exploitation mode and the driver for the sPAPR guests. Signed-off-by: Cédric Le Goater --- arch/powerpc/include/asm/xive.h | 23 +++++++++++++++++++++++ arch/powerpc/sysdev/xive/spapr.c | 28 ++++++++-------------------- 2 files changed, 31 insertions(+), 20 deletions(-) diff --git a/arch/powerpc/include/asm/xive.h b/arch/powerpc/include/asm/xive.h index 8d1a2792484f..33c76321f91a 100644 --- a/arch/powerpc/include/asm/xive.h +++ b/arch/powerpc/include/asm/xive.h @@ -94,6 +94,29 @@ extern void xive_flush_interrupt(void); /* xmon hook */ extern void xmon_xive_do_dump(int cpu); +/* + * Hcall flags shared by the sPAPR backend and KVM + */ + +/* H_INT_GET_SOURCE_INFO */ +#define XIVE_SPAPR_SRC_H_INT_ESB PPC_BIT(60) +#define XIVE_SPAPR_SRC_LSI PPC_BIT(61) +#define XIVE_SPAPR_SRC_TRIGGER PPC_BIT(62) +#define XIVE_SPAPR_SRC_STORE_EOI PPC_BIT(63) + +/* H_INT_SET_SOURCE_CONFIG */ +#define XIVE_SPAPR_SRC_SET_EISN PPC_BIT(62) +#define XIVE_SPAPR_SRC_MASK PPC_BIT(63) /* unused */ + +/* H_INT_SET_QUEUE_CONFIG */ +#define XIVE_SPAPR_EQ_ALWAYS_NOTIFY PPC_BIT(63) + +/* H_INT_SET_QUEUE_CONFIG */ +#define XIVE_SPAPR_EQ_DEBUG PPC_BIT(63) + +/* H_INT_ESB */ +#define XIVE_SPAPR_ESB_STORE PPC_BIT(63) + /* APIs used by KVM */ extern u32 xive_native_default_eq_shift(void); extern u32 xive_native_alloc_vp_block(u32 max_vcpus); diff --git a/arch/powerpc/sysdev/xive/spapr.c b/arch/powerpc/sysdev/xive/spapr.c index 091f1d0d0af1..3cf5f8bf4c29 100644 --- a/arch/powerpc/sysdev/xive/spapr.c +++ b/arch/powerpc/sysdev/xive/spapr.c @@ -135,9 +135,6 @@ static long plpar_int_get_source_info(unsigned long flags, return 0; } -#define XIVE_SRC_SET_EISN (1ull << (63 - 62)) -#define XIVE_SRC_MASK (1ull << (63 - 63)) /* unused */ - static long plpar_int_set_source_config(unsigned long flags, unsigned long lisn, unsigned long target, @@ -187,8 +184,6 @@ static long plpar_int_get_queue_info(unsigned long flags, return 0; } -#define XIVE_EQ_ALWAYS_NOTIFY (1ull << (63 - 63)) - static long plpar_int_set_queue_config(unsigned long flags, unsigned long target, unsigned long priority, @@ -224,8 +219,6 @@ static long plpar_int_sync(unsigned long flags, unsigned long lisn) return 0; } -#define XIVE_ESB_FLAG_STORE (1ull << (63 - 63)) - static long plpar_int_esb(unsigned long flags, unsigned long lisn, unsigned long offset, @@ -255,7 +248,7 @@ static u64 xive_spapr_esb_rw(u32 lisn, u32 offset, u64 data, bool write) unsigned long read_data; long rc; - rc = plpar_int_esb(write ? XIVE_ESB_FLAG_STORE : 0, + rc = plpar_int_esb(write ? XIVE_SPAPR_ESB_STORE : 0, lisn, offset, data, &read_data); if (rc) return -1; @@ -263,11 +256,6 @@ static u64 xive_spapr_esb_rw(u32 lisn, u32 offset, u64 data, bool write) return write ? 0 : read_data; } -#define XIVE_SRC_H_INT_ESB (1ull << (63 - 60)) -#define XIVE_SRC_LSI (1ull << (63 - 61)) -#define XIVE_SRC_TRIGGER (1ull << (63 - 62)) -#define XIVE_SRC_STORE_EOI (1ull << (63 - 63)) - static int xive_spapr_populate_irq_data(u32 hw_irq, struct xive_irq_data *data) { long rc; @@ -283,11 +271,11 @@ static int xive_spapr_populate_irq_data(u32 hw_irq, struct xive_irq_data *data) if (rc) return -EINVAL; - if (flags & XIVE_SRC_H_INT_ESB) + if (flags & XIVE_SPAPR_SRC_H_INT_ESB) data->flags |= XIVE_IRQ_FLAG_H_INT_ESB; - if (flags & XIVE_SRC_STORE_EOI) + if (flags & XIVE_SPAPR_SRC_STORE_EOI) data->flags |= XIVE_IRQ_FLAG_STORE_EOI; - if (flags & XIVE_SRC_LSI) + if (flags & XIVE_SPAPR_SRC_LSI) data->flags |= XIVE_IRQ_FLAG_LSI; data->eoi_page = eoi_page; data->esb_shift = esb_shift; @@ -308,7 +296,7 @@ static int xive_spapr_populate_irq_data(u32 hw_irq, struct xive_irq_data *data) data->hw_irq = hw_irq; /* Full function page supports trigger */ - if (flags & XIVE_SRC_TRIGGER) { + if (flags & XIVE_SPAPR_SRC_TRIGGER) { data->trig_mmio = data->eoi_mmio; return 0; } @@ -325,8 +313,8 @@ static int xive_spapr_configure_irq(u32 hw_irq, u32 target, u8 prio, u32 sw_irq) { long rc; - rc = plpar_int_set_source_config(XIVE_SRC_SET_EISN, hw_irq, target, - prio, sw_irq); + rc = plpar_int_set_source_config(XIVE_SPAPR_SRC_SET_EISN, hw_irq, + target, prio, sw_irq); return rc == 0 ? 0 : -ENXIO; } @@ -366,7 +354,7 @@ static int xive_spapr_configure_queue(u32 target, struct xive_q *q, u8 prio, q->eoi_phys = esn_page; /* Default is to always notify */ - flags = XIVE_EQ_ALWAYS_NOTIFY; + flags = XIVE_SPAPR_EQ_ALWAYS_NOTIFY; /* Configure and enable the queue in HW */ rc = plpar_int_set_queue_config(flags, target, prio, qpage_phys, order);