| Message ID | 20180423145720.17244-4-lothar.felten@gmail.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Jagannadha Sutradharudu Teki |
| Headers | show |
| Series | [U-Boot,v3,1/5] sunxi: R40: add gigabit ethernet clocks | expand |
Hi, On Mon, Apr 23, 2018 at 04:57:19PM +0200, Lothar Felten wrote: > Add a device tree node for the Allwinner R40/V40 GMAC gigabit > ethernet interface. > The R40 SoC does not use the syscon register for GMAC settings. > > Signed-off-by: Lothar Felten <lothar.felten@gmail.com> > --- > arch/arm/dts/sun8i-r40.dtsi | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/arch/arm/dts/sun8i-r40.dtsi b/arch/arm/dts/sun8i-r40.dtsi > index ee22f6eb3a..b46fcbb0b9 100644 > --- a/arch/arm/dts/sun8i-r40.dtsi > +++ b/arch/arm/dts/sun8i-r40.dtsi > @@ -168,6 +168,27 @@ > #size-cells = <0>; > }; > > + gmac: ethernet@01c50000 { > + compatible = "allwinner,sun8i-r40-gmac"; > + reg = <0x01c50000 0x2000>; > + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "macirq"; > + clocks = <&osc24M>, <&osc24M>; > + clock-names = "stmmaceth", "allwinner_gmac_tx"; > + #address-cells = <1>; > + #size-cells = <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&gmac_pins_rgmii>; > + phy-mode = "rgmii"; If that's going to be overwritten in the DTS, maybe we should just drop it from the DTSI. The rest of the serie looks good to me, however, it is a best practice to have a changelog either in the cover letter (if you have one) or in the patches themselves so that reviewer know what changed between the two versions. Thanks! Maxime
On Mon, Apr 23, 2018 at 9:57 AM, Lothar Felten <lothar.felten@gmail.com> wrote: > Add a device tree node for the Allwinner R40/V40 GMAC gigabit > ethernet interface. > The R40 SoC does not use the syscon register for GMAC settings. > > Signed-off-by: Lothar Felten <lothar.felten@gmail.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
diff --git a/arch/arm/dts/sun8i-r40.dtsi b/arch/arm/dts/sun8i-r40.dtsi index ee22f6eb3a..b46fcbb0b9 100644 --- a/arch/arm/dts/sun8i-r40.dtsi +++ b/arch/arm/dts/sun8i-r40.dtsi @@ -168,6 +168,27 @@ #size-cells = <0>; }; + gmac: ethernet@01c50000 { + compatible = "allwinner,sun8i-r40-gmac"; + reg = <0x01c50000 0x2000>; + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + clocks = <&osc24M>, <&osc24M>; + clock-names = "stmmaceth", "allwinner_gmac_tx"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&gmac_pins_rgmii>; + phy-mode = "rgmii"; + status = "disabled"; + + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + }; + }; + gic: interrupt-controller@1c81000 { compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; reg = <0x01c81000 0x1000>,
Add a device tree node for the Allwinner R40/V40 GMAC gigabit ethernet interface. The R40 SoC does not use the syscon register for GMAC settings. Signed-off-by: Lothar Felten <lothar.felten@gmail.com> --- arch/arm/dts/sun8i-r40.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+)