| Message ID | 20180422105330.4712-2-martin.blumenstingl@googlemail.com |
|---|---|
| State | New |
| Headers | show |
| Series | pinctrl: meson: add support for the Meson8m2 SoC | expand |
On Sun, Apr 22, 2018 at 12:53:28PM +0200, Martin Blumenstingl wrote: > The Meson8m2 SoC is a variant of Meson8 with some updates from Meson8b > (such as the Gigabit capable DesignWare MAC). > It is mostly pin compatible with Meson8, only 10 (existing) CBUS pins > get an additional function (four of these are Ethernet RXD2, RXD3, TXD2 > and TXD3 which are required when the board uses an RGMII PHY). > The AOBUS pins seem to be identical on Meson8 and Meson8m2. > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> > --- > Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt | 2 ++ > 1 file changed, 2 insertions(+) Reviewed-by: Rob Herring <robh@kernel.org> -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Sun, Apr 22, 2018 at 12:53 PM, Martin Blumenstingl <martin.blumenstingl@googlemail.com> wrote: > The Meson8m2 SoC is a variant of Meson8 with some updates from Meson8b > (such as the Gigabit capable DesignWare MAC). > It is mostly pin compatible with Meson8, only 10 (existing) CBUS pins > get an additional function (four of these are Ethernet RXD2, RXD3, TXD2 > and TXD3 which are required when the board uses an RGMII PHY). > The AOBUS pins seem to be identical on Meson8 and Meson8m2. > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Patch applied with Rob's and Kevin's ACKs. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt index 2c12f9789116..54ecb8ab7788 100644 --- a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt @@ -3,8 +3,10 @@ Required properties for the root node: - compatible: one of "amlogic,meson8-cbus-pinctrl" "amlogic,meson8b-cbus-pinctrl" + "amlogic,meson8m2-cbus-pinctrl" "amlogic,meson8-aobus-pinctrl" "amlogic,meson8b-aobus-pinctrl" + "amlogic,meson8m2-aobus-pinctrl" "amlogic,meson-gxbb-periphs-pinctrl" "amlogic,meson-gxbb-aobus-pinctrl" "amlogic,meson-gxl-periphs-pinctrl"
The Meson8m2 SoC is a variant of Meson8 with some updates from Meson8b (such as the Gigabit capable DesignWare MAC). It is mostly pin compatible with Meson8, only 10 (existing) CBUS pins get an additional function (four of these are Ethernet RXD2, RXD3, TXD2 and TXD3 which are required when the board uses an RGMII PHY). The AOBUS pins seem to be identical on Meson8 and Meson8m2. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt | 2 ++ 1 file changed, 2 insertions(+)