Patchwork Avoid global state in arm_handle_option

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Submitter Joseph S. Myers
Date April 7, 2011, 10:06 p.m.
Message ID <Pine.LNX.4.64.1104072204460.11415@digraph.polyomino.org.uk>
Download mbox | patch
Permalink /patch/90238/
State New
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Comments

Joseph S. Myers - April 7, 2011, 10:06 p.m.
This patch stops the ARM handle_option hook from using global state -
in fact removing the hook altogether by using .opt Enum facilities for
what it did.

The -march, -mcpu and -mtune option values are made to use Enum.  The
Enum definitions go in a new generated file arm-tables.opt; for
-mcpu/-mtune these are generated from the existing arm-cores.def.  For
-march, since there was no enum for architecture values nor any
apparent need for one, and given the .def arrangements already used
for core names, I added a new arm-arches.def with the architecture
table.  In both cases, giving a help text on the Enum definitions
meant that generic code could do what arm_target_help previously did,
so that hook is also removed (the only implementation of the
TARGET_HELP hook is now for AVR).

arm_selected_* are now set at the start of arm_option_override.  When
I turn to dealing with global state in those hooks (and splitting the
parts needing global state into a separate hook) I expect to make
arm_selected_* purely local variables of arm_option_override, rather
than moving them to the gcc_options structure.  The only place they
are used outside that function is arm_file_start, and const char *
fields in the gcc_options structure can be added for those particular
uses.

Tested building cc1 and xgcc for cross to arm-eabi.  Will commit to
trunk in the absence of target maintainer objections.

contrib:
2011-04-07  Joseph Myers  <joseph@codesourcery.com>

	* gcc_update (gcc/config/arm/arm-tables.opt): New dependencies.

gcc:
2011-04-07  Joseph Myers  <joseph@codesourcery.com>

	* config.gcc (arm*-*-*): Add arm/arm-tables.opt to extra_options.
	* config/arm/arm-arches.def: New.
	* config/arm/arm-opts.h: New.
	* config/arm/genopt.sh: New.
	* config/arm/arm-tables.opt: New (generated).
	* config/arm/arm.c (arm_handle_option, arm_target_help,
	TARGET_HANDLE_OPTION, TARGET_HELP, arm_find_cpu): Remove.
	(all_architectures): Get most table contents from arm-arches.def.
	(arm_option_override): Set arm_selected_arch, arm_selected_cpu and
	arm_selected_tune here.
	* config/arm/arm.h (enum processor_type): Move to arm-opts.h.
	* config/arm/arm.opt (config/arm/arm-opts.h): New HeaderInclude.
	(march=, mcpu=, mtune=): Use Enum and Var.
	* config/arm/t-arm ($(srcdir)/config/arm/arm-tables.opt): New.
	(arm.o): Update dependencies.
Richard Earnshaw - April 11, 2011, 10:48 a.m.
On Thu, 2011-04-07 at 22:06 +0000, Joseph S. Myers wrote:
> This patch stops the ARM handle_option hook from using global state -
> in fact removing the hook altogether by using .opt Enum facilities for
> what it did.
> 
> The -march, -mcpu and -mtune option values are made to use Enum.  The
> Enum definitions go in a new generated file arm-tables.opt; for
> -mcpu/-mtune these are generated from the existing arm-cores.def.  For
> -march, since there was no enum for architecture values nor any
> apparent need for one, and given the .def arrangements already used
> for core names, I added a new arm-arches.def with the architecture
> table.  In both cases, giving a help text on the Enum definitions
> meant that generic code could do what arm_target_help previously did,
> so that hook is also removed (the only implementation of the
> TARGET_HELP hook is now for AVR).
> 
> arm_selected_* are now set at the start of arm_option_override.  When
> I turn to dealing with global state in those hooks (and splitting the
> parts needing global state into a separate hook) I expect to make
> arm_selected_* purely local variables of arm_option_override, rather
> than moving them to the gcc_options structure.  The only place they
> are used outside that function is arm_file_start, and const char *
> fields in the gcc_options structure can be added for those particular
> uses.
> 
> Tested building cc1 and xgcc for cross to arm-eabi.  Will commit to
> trunk in the absence of target maintainer objections.
> 
> contrib:
> 2011-04-07  Joseph Myers  <joseph@codesourcery.com>
> 
> 	* gcc_update (gcc/config/arm/arm-tables.opt): New dependencies.
> 
> gcc:
> 2011-04-07  Joseph Myers  <joseph@codesourcery.com>
> 
> 	* config.gcc (arm*-*-*): Add arm/arm-tables.opt to extra_options.
> 	* config/arm/arm-arches.def: New.
> 	* config/arm/arm-opts.h: New.
> 	* config/arm/genopt.sh: New.
> 	* config/arm/arm-tables.opt: New (generated).
> 	* config/arm/arm.c (arm_handle_option, arm_target_help,
> 	TARGET_HANDLE_OPTION, TARGET_HELP, arm_find_cpu): Remove.
> 	(all_architectures): Get most table contents from arm-arches.def.
> 	(arm_option_override): Set arm_selected_arch, arm_selected_cpu and
> 	arm_selected_tune here.
> 	* config/arm/arm.h (enum processor_type): Move to arm-opts.h.
> 	* config/arm/arm.opt (config/arm/arm-opts.h): New HeaderInclude.
> 	(march=, mcpu=, mtune=): Use Enum and Var.
> 	* config/arm/t-arm ($(srcdir)/config/arm/arm-tables.opt): New.
> 	(arm.o): Update dependencies.

OK.

R.

Patch

Index: contrib/gcc_update
===================================================================
--- contrib/gcc_update	(revision 172035)
+++ contrib/gcc_update	(working copy)
@@ -4,8 +4,8 @@ 
 # repository, with an emphasis on treating generated files correctly, so
 # that autoconf, gperf et al are not required for the ``end'' user.
 #
-# (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009, 2010
-# Free Software Foundation
+# (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009, 2010,
+# 2011 Free Software Foundation
 # Originally by Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at>, August 1998.
 #
 # This script is Free Software, and it can be copied, distributed and
@@ -80,6 +80,7 @@  gcc/cstamp-h.in: gcc/configure.ac
 gcc/config.in: gcc/cstamp-h.in
 gcc/fixinc/fixincl.x: gcc/fixinc/fixincl.tpl gcc/fixinc/inclhack.def
 gcc/config/arm/arm-tune.md: gcc/config/arm/arm-cores.def gcc/config/arm/gentune.sh
+gcc/config/arm/arm-tables.opt: gcc/config/arm/arm-arches.def gcc/config/arm/arm-cores.def gcc/config/arm/genopt.sh
 # And then, language-specific files
 gcc/cp/cfns.h: gcc/cp/cfns.gperf
 gcc/java/keyword.h: gcc/java/keyword.gperf
Index: gcc/config.gcc
===================================================================
--- gcc/config.gcc	(revision 172035)
+++ gcc/config.gcc	(working copy)
@@ -296,6 +296,7 @@  arm*-*-*)
 	extra_headers="mmintrin.h arm_neon.h"
 	c_target_objs="arm-c.o"
 	cxx_target_objs="arm-c.o"
+	extra_options="${extra_options} arm/arm-tables.opt"
 	;;
 avr-*-*)
 	cpu_type=avr
Index: gcc/config/arm/arm-tables.opt
===================================================================
--- gcc/config/arm/arm-tables.opt	(revision 0)
+++ gcc/config/arm/arm-tables.opt	(revision 0)
@@ -0,0 +1,341 @@ 
+; -*- buffer-read-only: t -*-
+; Generated automatically by genopt.sh from arm-cores.def and arm-arches.def.
+
+; Copyright (C) 2011 Free Software Foundation, Inc.
+;
+; This file is part of GCC.
+;
+; GCC is free software; you can redistribute it and/or modify it under
+; the terms of the GNU General Public License as published by the Free
+; Software Foundation; either version 3, or (at your option) any later
+; version.
+;
+; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+; for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with GCC; see the file COPYING3.  If not see
+; <http://www.gnu.org/licenses/>.
+
+Enum
+Name(processor_type) Type(enum processor_type)
+Known ARM CPUs (for use with the -mcpu= and -mtune= options):
+
+EnumValue
+Enum(processor_type) String(arm2) Value(arm2)
+
+EnumValue
+Enum(processor_type) String(arm250) Value(arm250)
+
+EnumValue
+Enum(processor_type) String(arm3) Value(arm3)
+
+EnumValue
+Enum(processor_type) String(arm6) Value(arm6)
+
+EnumValue
+Enum(processor_type) String(arm60) Value(arm60)
+
+EnumValue
+Enum(processor_type) String(arm600) Value(arm600)
+
+EnumValue
+Enum(processor_type) String(arm610) Value(arm610)
+
+EnumValue
+Enum(processor_type) String(arm620) Value(arm620)
+
+EnumValue
+Enum(processor_type) String(arm7) Value(arm7)
+
+EnumValue
+Enum(processor_type) String(arm7d) Value(arm7d)
+
+EnumValue
+Enum(processor_type) String(arm7di) Value(arm7di)
+
+EnumValue
+Enum(processor_type) String(arm70) Value(arm70)
+
+EnumValue
+Enum(processor_type) String(arm700) Value(arm700)
+
+EnumValue
+Enum(processor_type) String(arm700i) Value(arm700i)
+
+EnumValue
+Enum(processor_type) String(arm710) Value(arm710)
+
+EnumValue
+Enum(processor_type) String(arm720) Value(arm720)
+
+EnumValue
+Enum(processor_type) String(arm710c) Value(arm710c)
+
+EnumValue
+Enum(processor_type) String(arm7100) Value(arm7100)
+
+EnumValue
+Enum(processor_type) String(arm7500) Value(arm7500)
+
+EnumValue
+Enum(processor_type) String(arm7500fe) Value(arm7500fe)
+
+EnumValue
+Enum(processor_type) String(arm7m) Value(arm7m)
+
+EnumValue
+Enum(processor_type) String(arm7dm) Value(arm7dm)
+
+EnumValue
+Enum(processor_type) String(arm7dmi) Value(arm7dmi)
+
+EnumValue
+Enum(processor_type) String(arm8) Value(arm8)
+
+EnumValue
+Enum(processor_type) String(arm810) Value(arm810)
+
+EnumValue
+Enum(processor_type) String(strongarm) Value(strongarm)
+
+EnumValue
+Enum(processor_type) String(strongarm110) Value(strongarm110)
+
+EnumValue
+Enum(processor_type) String(strongarm1100) Value(strongarm1100)
+
+EnumValue
+Enum(processor_type) String(strongarm1110) Value(strongarm1110)
+
+EnumValue
+Enum(processor_type) String(fa526) Value(fa526)
+
+EnumValue
+Enum(processor_type) String(fa626) Value(fa626)
+
+EnumValue
+Enum(processor_type) String(arm7tdmi) Value(arm7tdmi)
+
+EnumValue
+Enum(processor_type) String(arm7tdmi-s) Value(arm7tdmis)
+
+EnumValue
+Enum(processor_type) String(arm710t) Value(arm710t)
+
+EnumValue
+Enum(processor_type) String(arm720t) Value(arm720t)
+
+EnumValue
+Enum(processor_type) String(arm740t) Value(arm740t)
+
+EnumValue
+Enum(processor_type) String(arm9) Value(arm9)
+
+EnumValue
+Enum(processor_type) String(arm9tdmi) Value(arm9tdmi)
+
+EnumValue
+Enum(processor_type) String(arm920) Value(arm920)
+
+EnumValue
+Enum(processor_type) String(arm920t) Value(arm920t)
+
+EnumValue
+Enum(processor_type) String(arm922t) Value(arm922t)
+
+EnumValue
+Enum(processor_type) String(arm940t) Value(arm940t)
+
+EnumValue
+Enum(processor_type) String(ep9312) Value(ep9312)
+
+EnumValue
+Enum(processor_type) String(arm10tdmi) Value(arm10tdmi)
+
+EnumValue
+Enum(processor_type) String(arm1020t) Value(arm1020t)
+
+EnumValue
+Enum(processor_type) String(arm9e) Value(arm9e)
+
+EnumValue
+Enum(processor_type) String(arm946e-s) Value(arm946es)
+
+EnumValue
+Enum(processor_type) String(arm966e-s) Value(arm966es)
+
+EnumValue
+Enum(processor_type) String(arm968e-s) Value(arm968es)
+
+EnumValue
+Enum(processor_type) String(arm10e) Value(arm10e)
+
+EnumValue
+Enum(processor_type) String(arm1020e) Value(arm1020e)
+
+EnumValue
+Enum(processor_type) String(arm1022e) Value(arm1022e)
+
+EnumValue
+Enum(processor_type) String(xscale) Value(xscale)
+
+EnumValue
+Enum(processor_type) String(iwmmxt) Value(iwmmxt)
+
+EnumValue
+Enum(processor_type) String(iwmmxt2) Value(iwmmxt2)
+
+EnumValue
+Enum(processor_type) String(fa606te) Value(fa606te)
+
+EnumValue
+Enum(processor_type) String(fa626te) Value(fa626te)
+
+EnumValue
+Enum(processor_type) String(fmp626) Value(fmp626)
+
+EnumValue
+Enum(processor_type) String(fa726te) Value(fa726te)
+
+EnumValue
+Enum(processor_type) String(arm926ej-s) Value(arm926ejs)
+
+EnumValue
+Enum(processor_type) String(arm1026ej-s) Value(arm1026ejs)
+
+EnumValue
+Enum(processor_type) String(arm1136j-s) Value(arm1136js)
+
+EnumValue
+Enum(processor_type) String(arm1136jf-s) Value(arm1136jfs)
+
+EnumValue
+Enum(processor_type) String(arm1176jz-s) Value(arm1176jzs)
+
+EnumValue
+Enum(processor_type) String(arm1176jzf-s) Value(arm1176jzfs)
+
+EnumValue
+Enum(processor_type) String(mpcorenovfp) Value(mpcorenovfp)
+
+EnumValue
+Enum(processor_type) String(mpcore) Value(mpcore)
+
+EnumValue
+Enum(processor_type) String(arm1156t2-s) Value(arm1156t2s)
+
+EnumValue
+Enum(processor_type) String(arm1156t2f-s) Value(arm1156t2fs)
+
+EnumValue
+Enum(processor_type) String(cortex-a5) Value(cortexa5)
+
+EnumValue
+Enum(processor_type) String(cortex-a8) Value(cortexa8)
+
+EnumValue
+Enum(processor_type) String(cortex-a9) Value(cortexa9)
+
+EnumValue
+Enum(processor_type) String(cortex-a15) Value(cortexa15)
+
+EnumValue
+Enum(processor_type) String(cortex-r4) Value(cortexr4)
+
+EnumValue
+Enum(processor_type) String(cortex-r4f) Value(cortexr4f)
+
+EnumValue
+Enum(processor_type) String(cortex-m4) Value(cortexm4)
+
+EnumValue
+Enum(processor_type) String(cortex-m3) Value(cortexm3)
+
+EnumValue
+Enum(processor_type) String(cortex-m1) Value(cortexm1)
+
+EnumValue
+Enum(processor_type) String(cortex-m0) Value(cortexm0)
+
+Enum
+Name(arm_arch) Type(int)
+Known ARM architectures (for use with the -march= option):
+
+EnumValue
+Enum(arm_arch) String(armv2) Value(0)
+
+EnumValue
+Enum(arm_arch) String(armv2a) Value(1)
+
+EnumValue
+Enum(arm_arch) String(armv3) Value(2)
+
+EnumValue
+Enum(arm_arch) String(armv3m) Value(3)
+
+EnumValue
+Enum(arm_arch) String(armv4) Value(4)
+
+EnumValue
+Enum(arm_arch) String(armv4t) Value(5)
+
+EnumValue
+Enum(arm_arch) String(armv5) Value(6)
+
+EnumValue
+Enum(arm_arch) String(armv5t) Value(7)
+
+EnumValue
+Enum(arm_arch) String(armv5e) Value(8)
+
+EnumValue
+Enum(arm_arch) String(armv5te) Value(9)
+
+EnumValue
+Enum(arm_arch) String(armv6) Value(10)
+
+EnumValue
+Enum(arm_arch) String(armv6j) Value(11)
+
+EnumValue
+Enum(arm_arch) String(armv6k) Value(12)
+
+EnumValue
+Enum(arm_arch) String(armv6z) Value(13)
+
+EnumValue
+Enum(arm_arch) String(armv6zk) Value(14)
+
+EnumValue
+Enum(arm_arch) String(armv6t2) Value(15)
+
+EnumValue
+Enum(arm_arch) String(armv6-m) Value(16)
+
+EnumValue
+Enum(arm_arch) String(armv7) Value(17)
+
+EnumValue
+Enum(arm_arch) String(armv7-a) Value(18)
+
+EnumValue
+Enum(arm_arch) String(armv7-r) Value(19)
+
+EnumValue
+Enum(arm_arch) String(armv7-m) Value(20)
+
+EnumValue
+Enum(arm_arch) String(armv7e-m) Value(21)
+
+EnumValue
+Enum(arm_arch) String(ep9312) Value(22)
+
+EnumValue
+Enum(arm_arch) String(iwmmxt) Value(23)
+
+EnumValue
+Enum(arm_arch) String(iwmmxt2) Value(24)
+
Index: gcc/config/arm/arm.c
===================================================================
--- gcc/config/arm/arm.c	(revision 172035)
+++ gcc/config/arm/arm.c	(working copy)
@@ -219,9 +219,6 @@  static tree arm_build_builtin_va_list (v
 static void arm_expand_builtin_va_start (tree, rtx);
 static tree arm_gimplify_va_arg_expr (tree, tree, gimple_seq *, gimple_seq *);
 static void arm_option_override (void);
-static bool arm_handle_option (struct gcc_options *, struct gcc_options *,
-			       const struct cl_decoded_option *, location_t);
-static void arm_target_help (void);
 static unsigned HOST_WIDE_INT arm_shift_truncation_mask (enum machine_mode);
 static bool arm_cannot_copy_insn_p (rtx);
 static bool arm_tls_symbol_p (rtx x);
@@ -349,10 +346,6 @@  static const struct default_options arm_
 
 #undef  TARGET_DEFAULT_TARGET_FLAGS
 #define TARGET_DEFAULT_TARGET_FLAGS (TARGET_DEFAULT | MASK_SCHED_PROLOG)
-#undef  TARGET_HANDLE_OPTION
-#define TARGET_HANDLE_OPTION arm_handle_option
-#undef  TARGET_HELP
-#define TARGET_HELP arm_target_help
 #undef  TARGET_OPTION_OVERRIDE
 #define TARGET_OPTION_OVERRIDE arm_option_override
 #undef  TARGET_OPTION_OPTIMIZATION_TABLE
@@ -927,33 +920,10 @@  static const struct processors all_archi
   /* We don't specify tuning costs here as it will be figured out
      from the core.  */
 
-  {"armv2",   arm2,       "2",   FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH2, NULL},
-  {"armv2a",  arm2,       "2",   FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH2, NULL},
-  {"armv3",   arm6,       "3",   FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH3, NULL},
-  {"armv3m",  arm7m,      "3M",  FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH3M, NULL},
-  {"armv4",   arm7tdmi,   "4",   FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH4, NULL},
-  /* Strictly, FL_MODE26 is a permitted option for v4t, but there are no
-     implementations that support it, so we will leave it out for now.  */
-  {"armv4t",  arm7tdmi,   "4T",  FL_CO_PROC |             FL_FOR_ARCH4T, NULL},
-  {"armv5",   arm10tdmi,  "5",   FL_CO_PROC |             FL_FOR_ARCH5, NULL},
-  {"armv5t",  arm10tdmi,  "5T",  FL_CO_PROC |             FL_FOR_ARCH5T, NULL},
-  {"armv5e",  arm1026ejs, "5E",  FL_CO_PROC |             FL_FOR_ARCH5E, NULL},
-  {"armv5te", arm1026ejs, "5TE", FL_CO_PROC |             FL_FOR_ARCH5TE, NULL},
-  {"armv6",   arm1136js,  "6",   FL_CO_PROC |             FL_FOR_ARCH6, NULL},
-  {"armv6j",  arm1136js,  "6J",  FL_CO_PROC |             FL_FOR_ARCH6J, NULL},
-  {"armv6k",  mpcore,	  "6K",  FL_CO_PROC |             FL_FOR_ARCH6K, NULL},
-  {"armv6z",  arm1176jzs, "6Z",  FL_CO_PROC |             FL_FOR_ARCH6Z, NULL},
-  {"armv6zk", arm1176jzs, "6ZK", FL_CO_PROC |             FL_FOR_ARCH6ZK, NULL},
-  {"armv6t2", arm1156t2s, "6T2", FL_CO_PROC |             FL_FOR_ARCH6T2, NULL},
-  {"armv6-m", cortexm1,	  "6M",				  FL_FOR_ARCH6M, NULL},
-  {"armv7",   cortexa8,	  "7",	 FL_CO_PROC |		  FL_FOR_ARCH7, NULL},
-  {"armv7-a", cortexa8,	  "7A",	 FL_CO_PROC |		  FL_FOR_ARCH7A, NULL},
-  {"armv7-r", cortexr4,	  "7R",	 FL_CO_PROC |		  FL_FOR_ARCH7R, NULL},
-  {"armv7-m", cortexm3,	  "7M",	 FL_CO_PROC |		  FL_FOR_ARCH7M, NULL},
-  {"armv7e-m", cortexm4,  "7EM", FL_CO_PROC |		  FL_FOR_ARCH7EM, NULL},
-  {"ep9312",  ep9312,     "4T",  FL_LDSCHED | FL_CIRRUS | FL_FOR_ARCH4, NULL},
-  {"iwmmxt",  iwmmxt,     "5TE", FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT , NULL},
-  {"iwmmxt2", iwmmxt2,     "5TE", FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT , NULL},
+#define ARM_ARCH(NAME, CORE, ARCH, FLAGS) \
+  {NAME, CORE, #ARCH, FLAGS, NULL},
+#include "arm-arches.def"
+#undef ARM_ARCH
   {NULL, arm_none, NULL, 0 , NULL}
 };
 
@@ -1325,148 +1295,21 @@  arm_gimplify_va_arg_expr (tree valist, t
   return std_gimplify_va_arg_expr (valist, type, pre_p, post_p);
 }
 
-/* Lookup NAME in SEL.  */
-
-static const struct processors *
-arm_find_cpu (const char *name, const struct processors *sel, const char *desc)
-{
-  if (!(name && *name))
-    return NULL;
-
-  for (; sel->name != NULL; sel++)
-    {
-      if (streq (name, sel->name))
-	return sel;
-    }
-
-  error ("bad value (%s) for %s switch", name, desc);
-  return NULL;
-}
-
-/* Implement TARGET_HANDLE_OPTION.  */
-
-static bool
-arm_handle_option (struct gcc_options *opts, struct gcc_options *opts_set,
-		   const struct cl_decoded_option *decoded,
-		   location_t loc ATTRIBUTE_UNUSED)
-{
-  size_t code = decoded->opt_index;
-  const char *arg = decoded->arg;
-
-  gcc_assert (opts == &global_options);
-  gcc_assert (opts_set == &global_options_set);
-
-  switch (code)
-    {
-    case OPT_march_:
-      arm_selected_arch = arm_find_cpu(arg, all_architectures, "-march");
-      return true;
-
-    case OPT_mcpu_:
-      arm_selected_cpu = arm_find_cpu(arg, all_cores, "-mcpu");
-      return true;
-
-    case OPT_mtune_:
-      arm_selected_tune = arm_find_cpu(arg, all_cores, "-mtune");
-      return true;
-
-    default:
-      return true;
-    }
-}
-
-static void
-arm_target_help (void)
-{
-  int i;
-  static int columns = 0;
-  int remaining;
-
-  /* If we have not done so already, obtain the desired maximum width of
-     the output.  Note - this is a duplication of the code at the start of
-     gcc/opts.c:print_specific_help() - the two copies should probably be
-     replaced by a single function.  */
-  if (columns == 0)
-    {
-      const char *p;
-
-      p = getenv ("COLUMNS");
-      if (p != NULL)
-	{
-	  int value = atoi (p);
-
-	  if (value > 0)
-	    columns = value;
-	}
-
-      if (columns == 0)
-	/* Use a reasonable default.  */
-	columns = 80;
-    }
-
-  printf ("  Known ARM CPUs (for use with the -mcpu= and -mtune= options):\n");
-
-  /* The - 2 is because we know that the last entry in the array is NULL.  */
-  i = ARRAY_SIZE (all_cores) - 2;
-  gcc_assert (i > 0);
-  printf ("    %s", all_cores[i].name);
-  remaining = columns - (strlen (all_cores[i].name) + 4);
-  gcc_assert (remaining >= 0);
-
-  while (i--)
-    {
-      int len = strlen (all_cores[i].name);
-
-      if (remaining > len + 2)
-	{
-	  printf (", %s", all_cores[i].name);
-	  remaining -= len + 2;
-	}
-      else
-	{
-	  if (remaining > 0)
-	    printf (",");
-	  printf ("\n    %s", all_cores[i].name);
-	  remaining = columns - (len + 4);
-	}
-    }
-
-  printf ("\n\n  Known ARM architectures (for use with the -march= option):\n");
-
-  i = ARRAY_SIZE (all_architectures) - 2;
-  gcc_assert (i > 0);
-  
-  printf ("    %s", all_architectures[i].name);
-  remaining = columns - (strlen (all_architectures[i].name) + 4);
-  gcc_assert (remaining >= 0);
-
-  while (i--)
-    {
-      int len = strlen (all_architectures[i].name);
-
-      if (remaining > len + 2)
-	{
-	  printf (", %s", all_architectures[i].name);
-	  remaining -= len + 2;
-	}
-      else
-	{
-	  if (remaining > 0)
-	    printf (",");
-	  printf ("\n    %s", all_architectures[i].name);
-	  remaining = columns - (len + 4);
-	}
-    }
-  printf ("\n");
-
-}
-
 /* Fix up any incompatible options that the user has specified.  */
 static void
 arm_option_override (void)
 {
   unsigned i;
 
+  if (global_options_set.x_arm_arch_option)
+    arm_selected_arch = &all_architectures[arm_arch_option];
+
+  if (global_options_set.x_arm_cpu_option)
+    arm_selected_cpu = &all_cores[(int) arm_cpu_option];
+
+  if (global_options_set.x_arm_tune_option)
+    arm_selected_tune = &all_cores[(int) arm_tune_option];
+
 #ifdef SUBTARGET_OVERRIDE_OPTIONS
   SUBTARGET_OVERRIDE_OPTIONS;
 #endif
Index: gcc/config/arm/arm.h
===================================================================
--- gcc/config/arm/arm.h	(revision 172035)
+++ gcc/config/arm/arm.h	(working copy)
@@ -103,16 +103,7 @@  extern char arm_arch_name[];
 	  }						\
     } while (0)
 
-/* The various ARM cores.  */
-enum processor_type
-{
-#define ARM_CORE(NAME, IDENT, ARCH, FLAGS, COSTS) \
-  IDENT,
-#include "arm-cores.def"
-#undef ARM_CORE
-  /* Used to indicate that no processor has been specified.  */
-  arm_none
-};
+#include "config/arm/arm-opts.h"
 
 enum target_cpus
 {
Index: gcc/config/arm/genopt.sh
===================================================================
--- gcc/config/arm/genopt.sh	(revision 0)
+++ gcc/config/arm/genopt.sh	(revision 0)
@@ -0,0 +1,75 @@ 
+#!/bin/sh
+# Generate arm-tables.opt from the lists in *.def.
+# Copyright (C) 2011 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+cat <<EOF
+; -*- buffer-read-only: t -*-
+; Generated automatically by genopt.sh from arm-cores.def and arm-arches.def.
+
+; Copyright (C) 2011 Free Software Foundation, Inc.
+;
+; This file is part of GCC.
+;
+; GCC is free software; you can redistribute it and/or modify it under
+; the terms of the GNU General Public License as published by the Free
+; Software Foundation; either version 3, or (at your option) any later
+; version.
+;
+; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+; for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with GCC; see the file COPYING3.  If not see
+; <http://www.gnu.org/licenses/>.
+
+Enum
+Name(processor_type) Type(enum processor_type)
+Known ARM CPUs (for use with the -mcpu= and -mtune= options):
+
+EOF
+
+awk -F'[(, 	]+' '/^ARM_CORE/ {
+    name = $2
+    enum = $3
+    gsub("\"", "", name)
+    print "EnumValue"
+    print "Enum(processor_type) String(" name ") Value(" enum ")"
+    print ""
+}' $1/arm-cores.def
+
+cat <<EOF
+Enum
+Name(arm_arch) Type(int)
+Known ARM architectures (for use with the -march= option):
+
+EOF
+
+awk -F'[(, 	]+' 'BEGIN {
+    value = 0
+}
+/^ARM_ARCH/ {
+    name = $2
+    gsub("\"", "", name)
+    print "EnumValue"
+    print "Enum(arm_arch) String(" name ") Value(" value ")"
+    print ""
+    value++
+}' $1/arm-arches.def

Property changes on: gcc/config/arm/genopt.sh
___________________________________________________________________
Added: svn:executable
   + *

Index: gcc/config/arm/arm-arches.def
===================================================================
--- gcc/config/arm/arm-arches.def	(revision 0)
+++ gcc/config/arm/arm-arches.def	(revision 0)
@@ -0,0 +1,59 @@ 
+/* ARM CPU architectures.
+   Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001,
+   2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
+   Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with GCC; see the file COPYING3.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Before using #include to read this file, define a macro:
+
+      ARM_ARCH(NAME, CORE, ARCH, FLAGS)
+
+   The NAME is the name of the architecture, represented as a string
+   constant.  The CORE is the identifier for a core representative of
+   this architecture.  ARCH is the architecture revision.  FLAGS are
+   the flags implied by the architecture.
+
+   genopt.sh assumes no whitespace up to the first "," in each entry.  */
+
+ARM_ARCH("armv2",   arm2,       2,   FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH2)
+ARM_ARCH("armv2a",  arm2,       2,   FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH2)
+ARM_ARCH("armv3",   arm6,       3,   FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH3)
+ARM_ARCH("armv3m",  arm7m,      3M,  FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH3M)
+ARM_ARCH("armv4",   arm7tdmi,   4,   FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH4)
+/* Strictly, FL_MODE26 is a permitted option for v4t, but there are no
+   implementations that support it, so we will leave it out for now.  */
+ARM_ARCH("armv4t",  arm7tdmi,   4T,  FL_CO_PROC |             FL_FOR_ARCH4T)
+ARM_ARCH("armv5",   arm10tdmi,  5,   FL_CO_PROC |             FL_FOR_ARCH5)
+ARM_ARCH("armv5t",  arm10tdmi,  5T,  FL_CO_PROC |             FL_FOR_ARCH5T)
+ARM_ARCH("armv5e",  arm1026ejs, 5E,  FL_CO_PROC |             FL_FOR_ARCH5E)
+ARM_ARCH("armv5te", arm1026ejs, 5TE, FL_CO_PROC |             FL_FOR_ARCH5TE)
+ARM_ARCH("armv6",   arm1136js,  6,   FL_CO_PROC |             FL_FOR_ARCH6)
+ARM_ARCH("armv6j",  arm1136js,  6J,  FL_CO_PROC |             FL_FOR_ARCH6J)
+ARM_ARCH("armv6k",  mpcore,	6K,  FL_CO_PROC |             FL_FOR_ARCH6K)
+ARM_ARCH("armv6z",  arm1176jzs, 6Z,  FL_CO_PROC |             FL_FOR_ARCH6Z)
+ARM_ARCH("armv6zk", arm1176jzs, 6ZK, FL_CO_PROC |             FL_FOR_ARCH6ZK)
+ARM_ARCH("armv6t2", arm1156t2s, 6T2, FL_CO_PROC |             FL_FOR_ARCH6T2)
+ARM_ARCH("armv6-m", cortexm1,	6M,			      FL_FOR_ARCH6M)
+ARM_ARCH("armv7",   cortexa8,	7,   FL_CO_PROC |	      FL_FOR_ARCH7)
+ARM_ARCH("armv7-a", cortexa8,	7A,  FL_CO_PROC |	      FL_FOR_ARCH7A)
+ARM_ARCH("armv7-r", cortexr4,	7R,  FL_CO_PROC |	      FL_FOR_ARCH7R)
+ARM_ARCH("armv7-m", cortexm3,	7M,  FL_CO_PROC |	      FL_FOR_ARCH7M)
+ARM_ARCH("armv7e-m", cortexm4,  7EM, FL_CO_PROC |	      FL_FOR_ARCH7EM)
+ARM_ARCH("ep9312",  ep9312,     4T,  FL_LDSCHED | FL_CIRRUS | FL_FOR_ARCH4)
+ARM_ARCH("iwmmxt",  iwmmxt,     5TE, FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT)
+ARM_ARCH("iwmmxt2", iwmmxt2,    5TE, FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT)
Index: gcc/config/arm/t-arm
===================================================================
--- gcc/config/arm/t-arm	(revision 172035)
+++ gcc/config/arm/t-arm	(working copy)
@@ -51,6 +51,11 @@  $(srcdir)/config/arm/arm-tune.md: $(srcd
 		$(srcdir)/config/arm/arm-cores.def > \
 		$(srcdir)/config/arm/arm-tune.md
 
+$(srcdir)/config/arm/arm-tables.opt: $(srcdir)/config/arm/genopt.sh \
+  $(srcdir)/config/arm/arm-cores.def $(srcdir)/config/arm/arm-arches.def
+	$(SHELL) $(srcdir)/config/arm/genopt.sh $(srcdir)/config/arm > \
+		$(srcdir)/config/arm/arm-tables.opt
+
 arm.o: $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \
   $(RTL_H) $(TREE_H) $(OBSTACK_H) $(REGS_H) hard-reg-set.h \
   insn-config.h conditions.h output.h \
@@ -58,7 +63,8 @@  arm.o: $(CONFIG_H) $(SYSTEM_H) coretypes
   $(EXPR_H) $(OPTABS_H) $(RECOG_H) $(CGRAPH_H) \
   $(GGC_H) except.h $(C_PRAGMA_H) $(INTEGRATE_H) $(TM_P_H) \
   $(TARGET_H) $(TARGET_DEF_H) debug.h langhooks.h $(DF_H) \
-  intl.h libfuncs.h $(PARAMS_H) $(OPTS_H)
+  intl.h libfuncs.h $(PARAMS_H) $(OPTS_H) $(srcdir)/config/arm/arm-cores.def \
+  $(srcdir)/config/arm/arm-arches.def
 
 arm-c.o: $(srcdir)/config/arm/arm-c.c $(CONFIG_H) $(SYSTEM_H) \
     coretypes.h $(TM_H) $(TREE_H) output.h $(C_COMMON_H)
Index: gcc/config/arm/arm.opt
===================================================================
--- gcc/config/arm/arm.opt	(revision 172035)
+++ gcc/config/arm/arm.opt	(working copy)
@@ -1,6 +1,6 @@ 
 ; Options for the ARM port of the compiler.
 
-; Copyright (C) 2005, 2007, 2008 Free Software Foundation, Inc.
+; Copyright (C) 2005, 2007, 2008, 2009, 2011 Free Software Foundation, Inc.
 ;
 ; This file is part of GCC.
 ;
@@ -18,6 +18,9 @@ 
 ; along with GCC; see the file COPYING3.  If not see
 ; <http://www.gnu.org/licenses/>.
 
+HeaderInclude
+config/arm/arm-opts.h
+
 mabi=
 Target RejectNegative Joined Var(target_abi_name)
 Specify an ABI
@@ -45,7 +48,7 @@  mapcs-stack-check
 Target Report Mask(APCS_STACK) Undocumented
 
 march=
-Target RejectNegative Joined
+Target RejectNegative Joined Enum(arm_arch) Var(arm_arch_option)
 Specify the name of the target architecture
 
 marm
@@ -68,7 +71,7 @@  Target Report Mask(CIRRUS_FIX_INVALID_IN
 Cirrus: Place NOPs to avoid invalid instruction combinations
 
 mcpu=
-Target RejectNegative Joined
+Target RejectNegative Joined Enum(processor_type) Var(arm_cpu_option) Init(arm_none)
 Specify the name of the target CPU
 
 mfloat-abi=
@@ -148,7 +151,7 @@  Target Report Mask(TPCS_LEAF_FRAME)
 Thumb: Generate (leaf) stack frames even if not needed
 
 mtune=
-Target RejectNegative Joined
+Target RejectNegative Joined Enum(processor_type) Var(arm_tune_option) Init(arm_none)
 Tune code for the given processor
 
 mwords-little-endian
Index: gcc/config/arm/arm-opts.h
===================================================================
--- gcc/config/arm/arm-opts.h	(revision 0)
+++ gcc/config/arm/arm-opts.h	(revision 0)
@@ -0,0 +1,36 @@ 
+/* Definitions for option handling for ARM.
+   Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
+   2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
+   Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with GCC; see the file COPYING3.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef ARM_OPTS_H
+#define ARM_OPTS_H
+
+/* The various ARM cores.  */
+enum processor_type
+{
+#define ARM_CORE(NAME, IDENT, ARCH, FLAGS, COSTS) \
+  IDENT,
+#include "arm-cores.def"
+#undef ARM_CORE
+  /* Used to indicate that no processor has been specified.  */
+  arm_none
+};
+
+#endif