| Message ID | 20180419144741.17726-1-Eugeniy.Paltsev@synopsys.com |
|---|---|
| State | Accepted |
| Commit | 9b14ac5cc2294ac3eaae92421abff27ed3e6caae |
| Delegated to: | Jagannadha Sutradharudu Teki |
| Headers | show |
| Series | [U-Boot] DW SPI: invert wait condition in dw_spi_xfer | expand |
On Thu, Apr 19, 2018 at 8:17 PM, Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> wrote: > While switching to readl_poll_timeout macros from custom code > the waiting condition was accidently inverted, so it was pure > luck that this code works at least in some conditions. > > Fix that by inverting exit condition for readl_poll_timeout. > > Fixes: c6b4f031d9 ("DW SPI: fix tx data loss on FIFO flush") > > Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> > --- Applied to u-boot-spi/master
diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c index 0e93b62eee..5e2d290ddc 100644 --- a/drivers/spi/designware_spi.c +++ b/drivers/spi/designware_spi.c @@ -425,7 +425,7 @@ static int dw_spi_xfer(struct udevice *dev, unsigned int bitlen, * in the beginning of new transfer. */ if (readl_poll_timeout(priv->regs + DW_SPI_SR, val, - !(val & SR_TF_EMPT) || (val & SR_BUSY), + (val & SR_TF_EMPT) && !(val & SR_BUSY), RX_TIMEOUT * 1000)) { ret = -ETIMEDOUT; }
While switching to readl_poll_timeout macros from custom code the waiting condition was accidently inverted, so it was pure luck that this code works at least in some conditions. Fix that by inverting exit condition for readl_poll_timeout. Fixes: c6b4f031d9 ("DW SPI: fix tx data loss on FIFO flush") Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> --- drivers/spi/designware_spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)