From patchwork Wed Apr 6 20:18:34 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anatoly Sokolov X-Patchwork-Id: 90065 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id B2996B6F74 for ; Thu, 7 Apr 2011 06:18:20 +1000 (EST) Received: (qmail 23435 invoked by alias); 6 Apr 2011 20:18:17 -0000 Received: (qmail 23427 invoked by uid 22791); 6 Apr 2011 20:18:16 -0000 X-SWARE-Spam-Status: No, hits=1.7 required=5.0 tests=AWL, BAYES_20, KAM_THEBAT, RCVD_IN_DNSWL_NONE, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from contrabass.post.ru (HELO contrabass.corbina.net) (85.21.78.5) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 06 Apr 2011 20:18:09 +0000 Received: from corbina.ru (mail.post.ru [195.14.50.16]) by contrabass.corbina.net (Postfix) with ESMTP id 1D5EACA7BA; Thu, 7 Apr 2011 00:18:01 +0400 (MSD) Received: from [95.26.119.68] (account aesok@post.ru HELO Vista.corbina.ru) by corbina.ru (CommuniGate Pro SMTP 5.1.14) with ESMTPA id 315044705; Thu, 07 Apr 2011 00:18:01 +0400 Date: Thu, 7 Apr 2011 00:18:34 +0400 From: Anatoly Sokolov Message-ID: <84847522.20110407001834@post.ru> To: gcc-patches@gcc.gnu.org CC: echristo@apple.com, rdsandiford@googlemail.com Subject: [MIPS] Remove REG_OK_FOR_BASE_P and REG_OK_FOR_INDEX_P macros MIME-Version: 1.0 X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Hello. This patch remove unused REG_OK_FOR_BASE_P and REG_OK_FOR_INDEX_P macros from the MIPS back end. Bootstrapped and regression tested on mips64el-unknown-linux-gnu. OK to install? * config/mips/mips.h (REG_MODE_OK_FOR_BASE_P, REG_OK_FOR_INDEX_P): Remove macros. Anatoly. Index: gcc/config/mips/mips.h =================================================================== --- gcc/config/mips/mips.h (revision 171626) +++ gcc/config/mips/mips.h (working copy) @@ -2305,28 +2305,6 @@ #define REGNO_OK_FOR_INDEX_P(REGNO) 0 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) \ mips_regno_mode_ok_for_base_p (REGNO, MODE, 1) - -/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx - and check its validity for a certain class. - We have two alternate definitions for each of them. - The usual definition accepts all pseudo regs; the other rejects them all. - The symbol REG_OK_STRICT causes the latter definition to be used. - - Most source files want to accept pseudo regs in the hope that - they will get allocated to the class that the insn wants them to be in. - Some source files that are used after register allocation - need to be strict. */ - -#ifndef REG_OK_STRICT -#define REG_MODE_OK_FOR_BASE_P(X, MODE) \ - mips_regno_mode_ok_for_base_p (REGNO (X), MODE, 0) -#else -#define REG_MODE_OK_FOR_BASE_P(X, MODE) \ - mips_regno_mode_ok_for_base_p (REGNO (X), MODE, 1) -#endif - -#define REG_OK_FOR_INDEX_P(X) 0 - /* Maximum number of registers that can appear in a valid memory address. */