From patchwork Mon Apr 16 17:32:57 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mahesh J Salgaonkar X-Patchwork-Id: 898817 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 40PwTP2Tzbz9s3G for ; Tue, 17 Apr 2018 03:33:29 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 40PwTP0vlCzF1s3 for ; Tue, 17 Apr 2018 03:33:29 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=mahesh@linux.vnet.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 40PwT01p08zF1sY for ; Tue, 17 Apr 2018 03:33:08 +1000 (AEST) Received: from pps.filterd (m0098417.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w3GHVKSh009923 for ; Mon, 16 Apr 2018 13:33:05 -0400 Received: from e06smtp13.uk.ibm.com (e06smtp13.uk.ibm.com [195.75.94.109]) by mx0a-001b2d01.pphosted.com with ESMTP id 2hcxhb5jj0-1 (version=TLSv1.2 cipher=AES256-SHA256 bits=256 verify=NOT) for ; Mon, 16 Apr 2018 13:33:05 -0400 Received: from localhost by e06smtp13.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Mon, 16 Apr 2018 18:32:59 +0100 Received: from d06av25.portsmouth.uk.ibm.com (d06av25.portsmouth.uk.ibm.com [9.149.105.61]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w3GHWxvh55508992; Mon, 16 Apr 2018 17:32:59 GMT Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D17CD11C04C; Mon, 16 Apr 2018 18:24:56 +0100 (BST) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 59B1511C04A; Mon, 16 Apr 2018 18:24:56 +0100 (BST) Received: from jupiter.in.ibm.com (unknown [9.102.1.147]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Mon, 16 Apr 2018 18:24:56 +0100 (BST) From: Mahesh J Salgaonkar To: skiboot list Date: Mon, 16 Apr 2018 23:02:57 +0530 In-Reply-To: <152389987405.2566.355149283827806637.stgit@jupiter.in.ibm.com> References: <152389987405.2566.355149283827806637.stgit@jupiter.in.ibm.com> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 18041617-0012-0000-0000-000005CB7DA6 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18041617-0013-0000-0000-00001947C31B Message-Id: <152389997774.2566.16737043105317918808.stgit@jupiter.in.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-04-16_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1804160155 Subject: [Skiboot] [PATCH v2 01/15] opal/hmi: Don't re-read HMER multiple times X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" From: Benjamin Herrenschmidt We want to make sure all reporting and actions are based upon the same snapshot of HMER in case bits get added by HW while we are in OPAL. Signed-off-by: Benjamin Herrenschmidt --- core/hmi.c | 35 ++++++++++++++--------------------- 1 file changed, 14 insertions(+), 21 deletions(-) diff --git a/core/hmi.c b/core/hmi.c index 162dd8a11..8c100ade5 100644 --- a/core/hmi.c +++ b/core/hmi.c @@ -911,16 +911,13 @@ static int get_split_core_mode(void) * - SPR_TFMR_TB_RESIDUE_ERR * - SPR_TFMR_HDEC_PARITY_ERROR */ -static void pre_recovery_cleanup_p8(void) +static void pre_recovery_cleanup_p8(uint64_t hmer) { - uint64_t hmer; uint64_t tfmr; uint32_t sibling_thread_mask; int split_core_mode, subcore_id, thread_id, threads_per_core; int i; - hmer = mfspr(SPR_HMER); - /* exit if it is not Time facility error. */ if (!(hmer & SPR_HMER_TFAC_ERROR)) return; @@ -1018,15 +1015,12 @@ static void pre_recovery_cleanup_p8(void) * - SPR_TFMR_TB_RESIDUE_ERR * - SPR_TFMR_HDEC_PARITY_ERROR */ -static void pre_recovery_cleanup_p9(void) +static void pre_recovery_cleanup_p9(uint64_t hmer) { - uint64_t hmer; uint64_t tfmr; int threads_per_core = cpu_thread_count; int i; - hmer = mfspr(SPR_HMER); - /* exit if it is not Time facility error. */ if (!(hmer & SPR_HMER_TFAC_ERROR)) return; @@ -1104,12 +1098,12 @@ static void pre_recovery_cleanup_p9(void) wait_for_cleanup_complete(); } -static void pre_recovery_cleanup(void) +static void pre_recovery_cleanup(uint64_t hmer) { if (proc_gen == proc_gen_p9) - return pre_recovery_cleanup_p9(); + return pre_recovery_cleanup_p9(hmer); else - return pre_recovery_cleanup_p8(); + return pre_recovery_cleanup_p8(hmer); } static void hmi_exit(void) @@ -1118,9 +1112,8 @@ static void hmi_exit(void) *(this_cpu()->core_hmi_state_ptr) &= ~(this_cpu()->thread_mask); } -static void hmi_print_debug(const uint8_t *msg) +static void hmi_print_debug(const uint8_t *msg, uint64_t hmer) { - uint64_t hmer = mfspr(SPR_HMER); const char *loc; uint32_t core_id, thread_index; @@ -1152,7 +1145,7 @@ int handle_hmi_exception(uint64_t hmer, struct OpalHMIEvent *hmi_evt) * In case of split core, some of the Timer facility errors need * cleanup to be done before we proceed with the error recovery. */ - pre_recovery_cleanup(); + pre_recovery_cleanup(hmer); lock(&hmi_lock); /* @@ -1169,7 +1162,7 @@ int handle_hmi_exception(uint64_t hmer, struct OpalHMIEvent *hmi_evt) uint32_t core_id = pir_to_core_id(cpu->pir); uint64_t core_wof; - hmi_print_debug("Processor recovery occurred."); + hmi_print_debug("Processor recovery occurred.", hmer); if (!read_core_wof(chip_id, core_id, &core_wof)) { int i; @@ -1195,7 +1188,7 @@ int handle_hmi_exception(uint64_t hmer, struct OpalHMIEvent *hmi_evt) hmi_evt->type = OpalHMI_ERROR_PROC_RECOV_MASKED; queue_hmi_event(hmi_evt, recover); } - hmi_print_debug("Processor recovery Done (masked)."); + hmi_print_debug("Processor recovery Done (masked).", hmer); } if (hmer & SPR_HMER_PROC_RECV_AGAIN) { hmer &= ~SPR_HMER_PROC_RECV_AGAIN; @@ -1205,13 +1198,13 @@ int handle_hmi_exception(uint64_t hmer, struct OpalHMIEvent *hmi_evt) queue_hmi_event(hmi_evt, recover); } hmi_print_debug("Processor recovery occurred again before" - "bit2 was cleared\n"); + "bit2 was cleared\n", hmer); } /* Assert if we see malfunction alert, we can not continue. */ if (hmer & SPR_HMER_MALFUNCTION_ALERT) { hmer &= ~SPR_HMER_MALFUNCTION_ALERT; - hmi_print_debug("Malfunction Alert"); + hmi_print_debug("Malfunction Alert", hmer); if (hmi_evt) decode_malfunction(hmi_evt); } @@ -1220,7 +1213,7 @@ int handle_hmi_exception(uint64_t hmer, struct OpalHMIEvent *hmi_evt) if (hmer & SPR_HMER_HYP_RESOURCE_ERR) { hmer &= ~SPR_HMER_HYP_RESOURCE_ERR; - hmi_print_debug("Hypervisor resource error"); + hmi_print_debug("Hypervisor resource error", hmer); recover = 0; if (hmi_evt) { hmi_evt->severity = OpalHMI_SEV_FATAL; @@ -1236,7 +1229,7 @@ int handle_hmi_exception(uint64_t hmer, struct OpalHMIEvent *hmi_evt) if (hmer & SPR_HMER_TFAC_ERROR) { tfmr = mfspr(SPR_TFMR); /* save original TFMR */ - hmi_print_debug("Timer Facility Error"); + hmi_print_debug("Timer Facility Error", hmer); hmer &= ~SPR_HMER_TFAC_ERROR; recover = chiptod_recover_tb_errors(); @@ -1251,7 +1244,7 @@ int handle_hmi_exception(uint64_t hmer, struct OpalHMIEvent *hmi_evt) tfmr = mfspr(SPR_TFMR); /* save original TFMR */ hmer &= ~SPR_HMER_TFMR_PARITY_ERROR; - hmi_print_debug("TFMR parity Error"); + hmi_print_debug("TFMR parity Error", hmer); recover = chiptod_recover_tb_errors(); if (hmi_evt) { hmi_evt->severity = OpalHMI_SEV_FATAL;