From patchwork Tue Apr 10 21:35:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Segher Boessenkool X-Patchwork-Id: 896958 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-476170-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=kernel.crashing.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="JaN2P+Q5"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 40LL7c5hF0z9s1B for ; Wed, 11 Apr 2018 07:35:39 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id; q=dns; s=default; b=SIZpFlMNwR2l 1cay4neV3p+BFoGm+hzcnO3xTMMhDPCcaBRVydkO3pPTH7SbgQmqASnN8rfmfXql dMM4EtTm7DePTJVhSMGpJ1Y870VvCuTBFSz+bLsyboEvgeZr+R1kyl+99E5QdZW+ i654/Ned63yfGmzC+cPzFFtt771KQzk= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id; s=default; bh=AvQQEIyziJyeaRkBPM Xf+eMk4Ew=; b=JaN2P+Q5ybjszhovq3GgTTSlc60/W6fEDf6W/Kk5sriKIzNEAA M8fEbZzVM/WfNmP46nUW4VyDTrCNg5XFrsbVViNuE66O4apkeYmwoXS7a3kwTbkb Ap1KvjYl2U5Eq1CRa/VWe6ssDoTO7xfPv9J0Tue9cJLbfiMrBV0tNoBq8= Received: (qmail 73037 invoked by alias); 10 Apr 2018 21:35:32 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 73026 invoked by uid 89); 10 Apr 2018 21:35:32 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-24.3 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_LAZY_DOMAIN_SECURITY autolearn=ham version=3.3.2 spammy=32768, surrounding X-HELO: gcc1-power7.osuosl.org Received: from gcc1-power7.osuosl.org (HELO gcc1-power7.osuosl.org) (140.211.15.137) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 10 Apr 2018 21:35:30 +0000 Received: by gcc1-power7.osuosl.org (Postfix, from userid 10019) id 948AB12407C9; Tue, 10 Apr 2018 21:35:28 +0000 (UTC) From: Segher Boessenkool To: gcc-patches@gcc.gnu.org Cc: dje.gcc@gmail.com, Segher Boessenkool Subject: [PATCH] rs6000: Fix stack clash for big residuals (PR85287) Date: Tue, 10 Apr 2018 21:35:26 +0000 Message-Id: <953927ff385d2d1e74ef41a0d54ec0539df3acb2.1523395516.git.segher@kernel.crashing.org> X-IsSubscribed: yes The stack clash protection code had a logic error in how it decided whether to put the final update size in a register, or to emit it directly in an insn. This fixes it. It also tidies some surrounding code. Segher 2018-04-10 Segher Boessenkool * gcc/config/rs6000/rs6000.md (allocate_stack): Put the residual size for stack clash protection in a register whenever we need it to be in a register. --- gcc/config/rs6000/rs6000.md | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 62b4aa7..25ac0b8 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -9795,14 +9795,12 @@ (define_expand "allocate_stack" /* Now handle residuals. We just have to set operands[1] correctly and let the rest of the expander run. */ operands[1] = residual; - if (!CONST_INT_P (residual)) - operands[1] = force_reg (Pmode, operands[1]); } - if (GET_CODE (operands[1]) != CONST_INT - || INTVAL (operands[1]) < -32767 - || INTVAL (operands[1]) > 32768) + if (!(CONST_INT_P (operands[1]) + && IN_RANGE (INTVAL (operands[1]), -32767, 32768))) { + operands[1] = force_reg (Pmode, operands[1]); neg_op0 = gen_reg_rtx (Pmode); if (TARGET_32BIT) emit_insn (gen_negsi2 (neg_op0, operands[1])); @@ -9810,7 +9808,7 @@ (define_expand "allocate_stack" emit_insn (gen_negdi2 (neg_op0, operands[1])); } else - neg_op0 = GEN_INT (- INTVAL (operands[1])); + neg_op0 = GEN_INT (-INTVAL (operands[1])); insn = emit_insn ((* ((TARGET_32BIT) ? gen_movsi_update_stack : gen_movdi_di_update_stack))