diff mbox series

Fix some broadcasts in -masm=intel mode (PR target/85281)

Message ID 20180409182956.GW8577@tucnak
State New
Headers show
Series Fix some broadcasts in -masm=intel mode (PR target/85281) | expand

Commit Message

Jakub Jelinek April 9, 2018, 6:29 p.m. UTC 
Hi!

As the following testcase shows, we emit an incorrect PTR prefix in a
vpbroadcastb instruction in -masm=intel mode; gas accepts and the manual
documents that the input operand is xmm2/m8 for vpbroadcastb and
xmm2/m16 for vpbroadcastw, so we need to use BYTE PTR and WORD PTR instead
of XMMWORD PTR.

The first two hunks are just a simplification, the only reason we couldn't
use <iptr> used in many other spots is that it wasn't covering the 512-bit
floating point vectors.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2018-04-09  Jakub Jelinek  <jakub@redhat.com>

	PR target/85281
	* config/i386/sse.md (iptr): Add V16SFmode and V8DFmode cases.
	(<avx512>_vec_dup<mode><mask_name>): Use a single pattern for modes
	other than V2DFmode using iptr mode attribute.
	(<avx512>_vec_dup<mode><mask_name>): Use iptr mode attribute.

	* gcc.target/i386/pr85281.c: New test.


	Jakub

Comments

Kirill Yukhin April 11, 2018, 10:49 a.m. UTC | #1 
Hello Jakub!
On 09 апр 20:29, Jakub Jelinek wrote:
> Hi!
> 
> As the following testcase shows, we emit an incorrect PTR prefix in a
> vpbroadcastb instruction in -masm=intel mode; gas accepts and the manual
> documents that the input operand is xmm2/m8 for vpbroadcastb and
> xmm2/m16 for vpbroadcastw, so we need to use BYTE PTR and WORD PTR instead
> of XMMWORD PTR.
> 
> The first two hunks are just a simplification, the only reason we couldn't
> use <iptr> used in many other spots is that it wasn't covering the 512-bit
> floating point vectors.
> 
> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
LGTM. Sorry for delay.

--
Thanks, K
diff mbox series

Patch

--- gcc/config/i386/sse.md.jj	2018-04-06 19:19:12.098129938 +0200
+++ gcc/config/i386/sse.md	2018-04-09 12:05:38.044703296 +0200
@@ -804,6 +804,7 @@  (define_mode_attr iptr
   [(V64QI "b") (V32HI "w") (V16SI "k") (V8DI "q")
    (V32QI "b") (V16HI "w") (V8SI "k") (V4DI "q")
    (V16QI "b") (V8HI "w") (V4SI "k") (V2DI "q")
+   (V16SF "k") (V8DF "q")
    (V8SF "k") (V4DF "q")
    (V4SF "k") (V2DF "q")
    (SF "k") (DF "q")])
@@ -17686,10 +17687,7 @@  (define_insn "<avx512>_vec_dup<mode><mas
   if (<MODE>mode == V2DFmode)
     return "vpbroadcastq\t{%1, %0<mask_operand2>|%0<mask_operand2>, %q1}";
 
-  if (GET_MODE_SIZE (GET_MODE_INNER (<MODE>mode)) == 4)
-    return "v<sseintprefix>broadcast<bcstscalarsuff>\t{%1, %0<mask_operand2>|%0<mask_operand2>, %k1}";
-  else
-    return "v<sseintprefix>broadcast<bcstscalarsuff>\t{%1, %0<mask_operand2>|%0<mask_operand2>, %q1}";
+  return "v<sseintprefix>broadcast<bcstscalarsuff>\t{%1, %0<mask_operand2>|%0<mask_operand2>, %<iptr>1}";
 }
   [(set_attr "type" "ssemov")
    (set_attr "prefix" "evex")
@@ -17702,7 +17700,7 @@  (define_insn "<avx512>_vec_dup<mode><mas
 	    (match_operand:<ssexmmmode> 1 "nonimmediate_operand" "vm")
 	    (parallel [(const_int 0)]))))]
   "TARGET_AVX512BW"
-  "vpbroadcast<bcstscalarsuff>\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}"
+  "vpbroadcast<bcstscalarsuff>\t{%1, %0<mask_operand2>|%0<mask_operand2>, %<iptr>1}"
   [(set_attr "type" "ssemov")
    (set_attr "prefix" "evex")
    (set_attr "mode" "<sseinsnmode>")])
--- gcc/testsuite/gcc.target/i386/pr85281.c.jj	2018-04-09 12:15:57.204757347 +0200
+++ gcc/testsuite/gcc.target/i386/pr85281.c	2018-04-09 12:17:56.938766026 +0200
@@ -0,0 +1,15 @@ 
+/* PR target/85281 */
+/* { dg-do assemble { target avx512bw } } */
+/* { dg-require-effective-target int128 } */
+/* { dg-require-effective-target masm_intel } */
+/* { dg-options "-O -mavx512bw -masm=intel -w" } */
+
+typedef char V __attribute__ ((__vector_size__ (64)));
+
+V
+foo (V v)
+{
+  v[8] /= (unsigned __int128) 0;
+  v[0] -= ~255;
+  return v;
+}