| Message ID | 1522993120-4070-1-git-send-email-alex.hung@canonical.com |
|---|---|
| State | Accepted |
| Headers | show |
| Series | cpu: msr: do not check SYSCALL MSRs | expand |
On 04/06/2018 01:38 PM, Alex Hung wrote: > This includes IA32_STAR, IA32_LSTAR and IA32_FMASK registers > > Signed-off-by: Alex Hung <alex.hung@canonical.com> > --- > src/cpu/msr/msr.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/src/cpu/msr/msr.c b/src/cpu/msr/msr.c > index 362bb33..70d8965 100644 > --- a/src/cpu/msr/msr.c > +++ b/src/cpu/msr/msr.c > @@ -294,9 +294,12 @@ static const msr_info AMD_MSRs[] = { > { "PAT", 0x00000277, 0x0707070707070703ULL, NULL }, > { "MTRR_DEF_TYPE", 0x000002ff, 0x0000000000000c0fULL, NULL }, > { "EFER", 0xc0000080, 0x0000000000000d01ULL, NULL }, > + /* Do not check syscall MSRs, they will be different on > + * each CPU, so checking them across CPUs is incorrect > { "STAR", 0xc0000081, 0xffffffffffffffffULL, NULL }, > { "LSTAR", 0xc0000082, 0xffffffffffffffffULL, NULL }, > { "FMASK", 0xc0000084, 0xffffffffffffffffULL, NULL }, > + */ > //{ "FS_BASE", 0xc0000100, 0xffffffffffffffffULL, NULL }, > //{ "GS_BASE", 0xc0000101, 0xffffffffffffffffULL, NULL }, > { "KERNEL_GS_BASE", 0xc0000102, 0xffffffffffffffffULL, NULL }, > @@ -437,9 +440,12 @@ static const msr_info IA32_MSRs[] = { > { "A_PMC6", 0x000004c7, 0xffffffffffffffffULL, NULL }, > { "A_PMC7", 0x000004c8, 0xffffffffffffffffULL, NULL }, > { "EFER", 0xc0000080, 0x0000000000000d01ULL, NULL }, > + /* Do not check syscall MSRs, they will be different on > + * each CPU, so checking them across CPUs is incorrect > { "STAR", 0xc0000081, 0xffffffffffffffffULL, NULL }, > { "LSTAR", 0xc0000082, 0xffffffffffffffffULL, NULL }, > { "FMASK", 0xc0000084, 0xffffffffffffffffULL, NULL }, > + */ > //{ "FS_BASE", 0xc0000100, 0xffffffffffffffffULL, NULL }, > //{ "GS_BASE", 0xc0000101, 0xffffffffffffffffULL, NULL }, > { "KERNEL_GS_BASE", 0xc0000102, 0xffffffffffffffffULL, NULL }, Acked-by: Ivan Hu <ivan.hu@canonical.com>
On 06/04/18 06:38, Alex Hung wrote: > This includes IA32_STAR, IA32_LSTAR and IA32_FMASK registers > > Signed-off-by: Alex Hung <alex.hung@canonical.com> > --- > src/cpu/msr/msr.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/src/cpu/msr/msr.c b/src/cpu/msr/msr.c > index 362bb33..70d8965 100644 > --- a/src/cpu/msr/msr.c > +++ b/src/cpu/msr/msr.c > @@ -294,9 +294,12 @@ static const msr_info AMD_MSRs[] = { > { "PAT", 0x00000277, 0x0707070707070703ULL, NULL }, > { "MTRR_DEF_TYPE", 0x000002ff, 0x0000000000000c0fULL, NULL }, > { "EFER", 0xc0000080, 0x0000000000000d01ULL, NULL }, > + /* Do not check syscall MSRs, they will be different on > + * each CPU, so checking them across CPUs is incorrect > { "STAR", 0xc0000081, 0xffffffffffffffffULL, NULL }, > { "LSTAR", 0xc0000082, 0xffffffffffffffffULL, NULL }, > { "FMASK", 0xc0000084, 0xffffffffffffffffULL, NULL }, > + */ > //{ "FS_BASE", 0xc0000100, 0xffffffffffffffffULL, NULL }, > //{ "GS_BASE", 0xc0000101, 0xffffffffffffffffULL, NULL }, > { "KERNEL_GS_BASE", 0xc0000102, 0xffffffffffffffffULL, NULL }, > @@ -437,9 +440,12 @@ static const msr_info IA32_MSRs[] = { > { "A_PMC6", 0x000004c7, 0xffffffffffffffffULL, NULL }, > { "A_PMC7", 0x000004c8, 0xffffffffffffffffULL, NULL }, > { "EFER", 0xc0000080, 0x0000000000000d01ULL, NULL }, > + /* Do not check syscall MSRs, they will be different on > + * each CPU, so checking them across CPUs is incorrect > { "STAR", 0xc0000081, 0xffffffffffffffffULL, NULL }, > { "LSTAR", 0xc0000082, 0xffffffffffffffffULL, NULL }, > { "FMASK", 0xc0000084, 0xffffffffffffffffULL, NULL }, > + */ > //{ "FS_BASE", 0xc0000100, 0xffffffffffffffffULL, NULL }, > //{ "GS_BASE", 0xc0000101, 0xffffffffffffffffULL, NULL }, > { "KERNEL_GS_BASE", 0xc0000102, 0xffffffffffffffffULL, NULL }, > Acked-by: Colin Ian King <colin.king@canonical.com>
diff --git a/src/cpu/msr/msr.c b/src/cpu/msr/msr.c index 362bb33..70d8965 100644 --- a/src/cpu/msr/msr.c +++ b/src/cpu/msr/msr.c @@ -294,9 +294,12 @@ static const msr_info AMD_MSRs[] = { { "PAT", 0x00000277, 0x0707070707070703ULL, NULL }, { "MTRR_DEF_TYPE", 0x000002ff, 0x0000000000000c0fULL, NULL }, { "EFER", 0xc0000080, 0x0000000000000d01ULL, NULL }, + /* Do not check syscall MSRs, they will be different on + * each CPU, so checking them across CPUs is incorrect { "STAR", 0xc0000081, 0xffffffffffffffffULL, NULL }, { "LSTAR", 0xc0000082, 0xffffffffffffffffULL, NULL }, { "FMASK", 0xc0000084, 0xffffffffffffffffULL, NULL }, + */ //{ "FS_BASE", 0xc0000100, 0xffffffffffffffffULL, NULL }, //{ "GS_BASE", 0xc0000101, 0xffffffffffffffffULL, NULL }, { "KERNEL_GS_BASE", 0xc0000102, 0xffffffffffffffffULL, NULL }, @@ -437,9 +440,12 @@ static const msr_info IA32_MSRs[] = { { "A_PMC6", 0x000004c7, 0xffffffffffffffffULL, NULL }, { "A_PMC7", 0x000004c8, 0xffffffffffffffffULL, NULL }, { "EFER", 0xc0000080, 0x0000000000000d01ULL, NULL }, + /* Do not check syscall MSRs, they will be different on + * each CPU, so checking them across CPUs is incorrect { "STAR", 0xc0000081, 0xffffffffffffffffULL, NULL }, { "LSTAR", 0xc0000082, 0xffffffffffffffffULL, NULL }, { "FMASK", 0xc0000084, 0xffffffffffffffffULL, NULL }, + */ //{ "FS_BASE", 0xc0000100, 0xffffffffffffffffULL, NULL }, //{ "GS_BASE", 0xc0000101, 0xffffffffffffffffULL, NULL }, { "KERNEL_GS_BASE", 0xc0000102, 0xffffffffffffffffULL, NULL },
This includes IA32_STAR, IA32_LSTAR and IA32_FMASK registers Signed-off-by: Alex Hung <alex.hung@canonical.com> --- src/cpu/msr/msr.c | 6 ++++++ 1 file changed, 6 insertions(+)