[RFC,3/4] dt-bindings: Add binding file for NXP FlexSPI driver

Message ID 1522836371-2828-4-git-send-email-yogeshnarayan.gaur@nxp.com
State Changes Requested
Delegated to: Cyrille Pitchen
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  • mtd: spi-nor: Add NXP FlexSPI driver
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Commit Message

Yogesh Narayan Gaur April 4, 2018, 10:06 a.m.
Added binding file for NXP FlexSPI driver in Documentation folder.

Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
---
 .../devicetree/bindings/mtd/nxp-flexspi.txt        | 40 ++++++++++++++++++++++
 1 file changed, 40 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mtd/nxp-flexspi.txt

Comments

Marek Vasut April 4, 2018, 10:37 a.m. | #1
On 04/04/2018 12:06 PM, Yogesh Gaur wrote:
> Added binding file for NXP FlexSPI driver in Documentation folder.

What's a "folder" ?

> Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
> ---
>  .../devicetree/bindings/mtd/nxp-flexspi.txt        | 40 ++++++++++++++++++++++
>  1 file changed, 40 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mtd/nxp-flexspi.txt
> 
> diff --git a/Documentation/devicetree/bindings/mtd/nxp-flexspi.txt b/Documentation/devicetree/bindings/mtd/nxp-flexspi.txt
> new file mode 100644
> index 0000000..23817dc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mtd/nxp-flexspi.txt
> @@ -0,0 +1,40 @@
> +* NXP Flex Serial Peripheral Interface(FlexSPI)
> +
> +Required properties:
> +  - compatible : Should be "nxp,lx2160a-fspi"
> +  - reg : the first contains the register location and length,
> +          the second contains the memory mapping address and length
> +  - reg-names: Should contain the reg names "FSPI" and "FSPI-memory"

This should be lowercase.

> +  - interrupts : Should contain the interrupt for the device
> +
> +Optional properties:
> +  - nxp,fspi-has-second-chip: The controller has two buses, bus A and bus B.
> +			      Each bus can be connected with two NOR flashes.
> +			      Most of the time, each bus only has one NOR flash
> +			      connected, this is the default case.
> +			      But if there are two NOR flashes connected to the
> +			      bus, you should enable this property.
> +			     ( Please check the board's schematic.)

Can't you model this by specifying two chips in the DT ?

> +  - big-endian : That means the IP register is big endian. If not specified,
> +		 IP register works in little endian mode.
> +
> +Example:
> +fspi0: flexspi@20c0000 {
> +	compatible = "nxp,lx2160a-fspi";
> +	reg = <0x0 0x20c0000 0x0 0x10000>, <0x0 0x20000000 0x0 0x10000000>;
> +	reg-names = "FSPI", "FSPI-memory";
> +	interrupts = <0 25 0x4>; /* Level high type */
> +
> +	status = "okay";
> +	nxp,fspi-has-second-chip;
> +	flash0: mt35xu512aba@0 {
> +		reg = <0>;
> +		....
> +	};
> +
> +	flash1: mt35xu512aba@1 {
> +		reg = <1>;
> +		....
> +	};
> +
> +};
>

Patch

diff --git a/Documentation/devicetree/bindings/mtd/nxp-flexspi.txt b/Documentation/devicetree/bindings/mtd/nxp-flexspi.txt
new file mode 100644
index 0000000..23817dc
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/nxp-flexspi.txt
@@ -0,0 +1,40 @@ 
+* NXP Flex Serial Peripheral Interface(FlexSPI)
+
+Required properties:
+  - compatible : Should be "nxp,lx2160a-fspi"
+  - reg : the first contains the register location and length,
+          the second contains the memory mapping address and length
+  - reg-names: Should contain the reg names "FSPI" and "FSPI-memory"
+  - interrupts : Should contain the interrupt for the device
+
+Optional properties:
+  - nxp,fspi-has-second-chip: The controller has two buses, bus A and bus B.
+			      Each bus can be connected with two NOR flashes.
+			      Most of the time, each bus only has one NOR flash
+			      connected, this is the default case.
+			      But if there are two NOR flashes connected to the
+			      bus, you should enable this property.
+			     ( Please check the board's schematic.)
+  - big-endian : That means the IP register is big endian. If not specified,
+		 IP register works in little endian mode.
+
+Example:
+fspi0: flexspi@20c0000 {
+	compatible = "nxp,lx2160a-fspi";
+	reg = <0x0 0x20c0000 0x0 0x10000>, <0x0 0x20000000 0x0 0x10000000>;
+	reg-names = "FSPI", "FSPI-memory";
+	interrupts = <0 25 0x4>; /* Level high type */
+
+	status = "okay";
+	nxp,fspi-has-second-chip;
+	flash0: mt35xu512aba@0 {
+		reg = <0>;
+		....
+	};
+
+	flash1: mt35xu512aba@1 {
+		reg = <1>;
+		....
+	};
+
+};