diff mbox series

phb4: Do not set the PBCQ Tunnel BAR register when enabling capi mode.

Message ID 20180403132746.29597-1-felix@linux.ibm.com
State Accepted
Headers show
Series phb4: Do not set the PBCQ Tunnel BAR register when enabling capi mode. | expand

Commit Message

Philippe Bergheaud April 3, 2018, 1:27 p.m. UTC 
The cxl driver will set the capi value, like other drivers already do.

Signed-off-by: Philippe Bergheaud <felix@linux.ibm.com>
---
 hw/phb4.c | 19 -------------------
 1 file changed, 19 deletions(-)

Comments

Stewart Smith April 10, 2018, 6:31 a.m. UTC | #1 
Philippe Bergheaud <felix@linux.ibm.com> writes:
> The cxl driver will set the capi value, like other drivers already do.
>
> Signed-off-by: Philippe Bergheaud <felix@linux.ibm.com>
> ---
>  hw/phb4.c | 19 -------------------
>  1 file changed, 19 deletions(-)

Cheers, merged to master as of e0cffe9554a527fb496eda4b561af623afdf01c4
diff mbox series

Patch

diff --git a/hw/phb4.c b/hw/phb4.c
index e45be01f..7ef6f3d4 100644
--- a/hw/phb4.c
+++ b/hw/phb4.c
@@ -3900,25 +3900,6 @@  static int64_t enable_capi_mode(struct phb4 *p, uint64_t pe_number,
 		 ((u64)CAPIMASK << 32) | PHB_CAPI_CMPM_ENABLE);
 
 	if (!(p->rev == PHB4_REV_NIMBUS_DD10)) {
-		/*
-		 * PBCQ Tunnel Bar Register
-		 *
-		 * If set, for example by a driver that may already have
-		 * tweaked the tunnel bar, then we do not touch it when
-		 * entering capi mode. It's up to the driver to handle it.
-		 *
-		 * If unset, then we use the PSL_TNR_ADDR[TNR_Addr] reset
-		 * value. For fpga/cxl, this code will define the tunnel bar.
-		 */
-		xscom_read(p->chip_id,
-			   p->pe_stk_xscom + XPEC_NEST_STK_TUNNEL_BAR, &reg);
-		if (!reg) {
-			reg = 0x00020000E0000000ull << 8;
-			xscom_write(p->chip_id,
-				    p->pe_stk_xscom + XPEC_NEST_STK_TUNNEL_BAR,
-				    reg);
-		}
-
 		/* PB AIB Hardware Control Register
 		 * Wait 32 PCI clocks for a credit to become available
 		 * before rejecting.