From patchwork Sun Apr 3 08:58:16 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mike Frysinger X-Patchwork-Id: 89480 X-Patchwork-Delegate: wd@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 4FF26B6F8D for ; Sun, 3 Apr 2011 19:00:48 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A65F128091; Sun, 3 Apr 2011 11:00:04 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id baLxJosGTiFD; Sun, 3 Apr 2011 11:00:04 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C3D95280DD; Sun, 3 Apr 2011 10:59:11 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 50E5328083 for ; Sun, 3 Apr 2011 10:59:08 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Pslbj2zJp+WJ for ; Sun, 3 Apr 2011 10:59:07 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from smtp.gentoo.org (smtp.gentoo.org [140.211.166.183]) by theia.denx.de (Postfix) with ESMTPS id 493742808F for ; Sun, 3 Apr 2011 10:58:48 +0200 (CEST) Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.gentoo.org (Postfix) with ESMTP id 039081B4014; Sun, 3 Apr 2011 08:58:45 +0000 (UTC) From: Mike Frysinger To: u-boot@lists.denx.de Date: Sun, 3 Apr 2011 04:58:16 -0400 Message-Id: <1301821121-26743-10-git-send-email-vapier@gentoo.org> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1301821121-26743-1-git-send-email-vapier@gentoo.org> References: <1301821121-26743-1-git-send-email-vapier@gentoo.org> Cc: Chong Huang , Haitao Zhang Subject: [U-Boot] [PATCH 09/34] Blackfin: bf525-ucr2: new board port X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Chong Huang Signed-off-by: Chong Huang Signed-off-by: Haitao Zhang Signed-off-by: Mike Frysinger --- MAINTAINERS | 5 ++ board/bf525-ucr2/Makefile | 54 +++++++++++++++++++++ board/bf525-ucr2/bf525-ucr2.c | 16 ++++++ boards.cfg | 1 + include/configs/bf525-ucr2.h | 102 +++++++++++++++++++++++++++++++++++++++++ 5 files changed, 178 insertions(+), 0 deletions(-) create mode 100644 board/bf525-ucr2/Makefile create mode 100644 board/bf525-ucr2/bf525-ucr2.c create mode 100644 include/configs/bf525-ucr2.h diff --git a/MAINTAINERS b/MAINTAINERS index 17327de..e4786bc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1117,6 +1117,11 @@ Anton Shurpin BF561-ACVILON BF561 +Haitao Zhang +Chong Huang + + bf525-ucr2 BF525 + ######################################################################### # End of MAINTAINERS list # ######################################################################### diff --git a/board/bf525-ucr2/Makefile b/board/bf525-ucr2/Makefile new file mode 100644 index 0000000..cde8168 --- /dev/null +++ b/board/bf525-ucr2/Makefile @@ -0,0 +1,54 @@ +# +# U-boot - Makefile +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS-y := $(BOARD).o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/bf525-ucr2/bf525-ucr2.c b/board/bf525-ucr2/bf525-ucr2.c new file mode 100644 index 0000000..3e6df1f --- /dev/null +++ b/board/bf525-ucr2/bf525-ucr2.c @@ -0,0 +1,16 @@ +/* U-boot - bf525-ucr2.c board specific routines + * + * (C) Copyright 2000-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * Licensed under the GPL-2 or later. + */ + +#include + +int checkboard(void) +{ + printf("Board: bf525-ucr2\n"); + printf("Support: http://www.ucrobotics.com/\n"); + return 0; +} diff --git a/boards.cfg b/boards.cfg index 57b4142..9c1bc00 100644 --- a/boards.cfg +++ b/boards.cfg @@ -175,6 +175,7 @@ mimc200 avr32 at32ap - mimc hammerhead avr32 at32ap - miromico at32ap700x bct-brettl2 blackfin blackfin bf518f-ezbrd blackfin blackfin +bf525-ucr2 blackfin blackfin bf526-ezbrd blackfin blackfin bf527-ad7160-eval blackfin blackfin bf527-ezkit blackfin blackfin diff --git a/include/configs/bf525-ucr2.h b/include/configs/bf525-ucr2.h new file mode 100644 index 0000000..1f65130 --- /dev/null +++ b/include/configs/bf525-ucr2.h @@ -0,0 +1,102 @@ +/* + * U-boot - Configuration file for bf525-ucr2 board + * The board includes ADSP-BF525 rev. 0.2, + * 32-bit SDRAM (SAMSUNG K4S561632H-UC75), + * USB 2.0 High Speed OTG USB WIFI, + * SPI flash (cFeon EN25Q128 16 MB), + * Support PPI and ITU-R656, + * See http://www.ucrobotics.com/?q=cn/ucr2 + */ + +#ifndef __CONFIG_BF525_UCR2_H__ +#define __CONFIG_BF525_UCR2_H__ + +#include + +/* + * Processor Settings + */ +#define CONFIG_BFIN_CPU bf525-0.2 +#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER + +/* + * Clock Settings + * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV + * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV + */ +/* CONFIG_CLKIN_HZ is any value in Hz */ +#define CONFIG_CLKIN_HZ 24000000 +/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ +/* 1 = CLKIN / 2 */ +#define CONFIG_CLKIN_HALF 0 +/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ +/* 1 = bypass PLL */ +#define CONFIG_PLL_BYPASS 0 +/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ +/* Values can range from 0-63 (where 0 means 64) */ +#define CONFIG_VCO_MULT 20 +/* CCLK_DIV controls the core clock divider */ +/* Values can be 1, 2, 4, or 8 ONLY */ +#define CONFIG_CCLK_DIV 1 +/* SCLK_DIV controls the system clock divider */ +/* Values can range from 1-15 */ +#define CONFIG_SCLK_DIV 4 + +/* + * Memory Settings + */ +#define CONFIG_MEM_ADD_WDTH 9 +#define CONFIG_MEM_SIZE 32 + +/* + * SDRAM reference page + * http://docs.blackfin.uclinux.org/doku.php?id=bfin:sdram + */ +#define CONFIG_EBIU_SDRRC_VAL 0x3f8 +#define CONFIG_EBIU_SDGCTL_VAL 0x9111cd + +#define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL) +#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) +#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) + +#define CONFIG_SYS_MONITOR_LEN (320 * 1024) +#define CONFIG_SYS_MALLOC_LEN (320 * 1024) + +/* We don't have a parallel flash chip */ +#define CONFIG_SYS_NO_FLASH + +/* support for serial flash */ +#define CONFIG_BFIN_SPI +#define CONFIG_SPI_FLASH +#define CONFIG_CMD_SF +#define CONFIG_SF_DEFAULT_HZ 30000000 +#define CONFIG_SPI_FLASH_EON + +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SPI_MAX_HZ 30000000 +#define CONFIG_ENV_OFFSET 0x10000 +#define CONFIG_ENV_SIZE 0x10000 +#define CONFIG_ENV_SECT_SIZE 0x10000 +#define CONFIG_ENV_OVERWRITE 1 + +/* + * Misc Settings + */ +#define CONFIG_UART_CONSOLE 0 + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_BOOTARGS "root=/dev/mtdblock0 rw" +#define CONFIG_BOOTCOMMAND "run sfboot" +#define CONFIG_BOOTDELAY 5 +#define CONFIG_EXTRA_ENV_SETTINGS \ + "sfboot=sf probe 1;" \ + "sf read 0x1000000 0x20000 0x300000;" \ + "bootm 0x1000000\0" + +/* this sets up the default list of enabled commands */ +#include +#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ +#undef CONFIG_CMD_NFS +#undef CONFIG_CMD_IMLS + +#endif