diff mbox series

[committed] Fix ix86_expand_vector_set for V64QImode (PR target/85169)

Message ID 20180403160712.GC8577@tucnak
State New
Headers show
Series [committed] Fix ix86_expand_vector_set for V64QImode (PR target/85169) | expand

Commit Message

Jakub Jelinek April 3, 2018, 4:07 p.m. UTC
Hi!

For V64QImode, elt can be 0 to 63, so 1 << elt invokes UB in the compiler
and we get wrong masks.

Bootstrapped/regtested on x86_64-linux and i686-linux, committed to trunk as
obvious.

2018-04-03  Jakub Jelinek  <jakub@redhat.com>

	PR target/85169
	* config/i386/i386.c (ix86_expand_vector_set): Use
	HOST_WIDE_INT_1U << elt instead of 1 << elt.  Formatting fix.

	* gcc.c-torture/execute/pr85169.c: New test.
	* gcc.target/i386/avx512f-pr85169.c: New test.
	* gcc.target/i386/avx512bw-pr85169.c: New test.


	Jakub
diff mbox series

Patch

--- gcc/config/i386/i386.c.jj	2018-04-01 08:03:37.938565056 +0200
+++ gcc/config/i386/i386.c	2018-04-03 12:40:43.181665150 +0200
@@ -44163,12 +44163,14 @@  quarter:
 	 where the mask is clear and second input operand otherwise.  */
       emit_insn (gen_blendm (target, target, tmp,
 			     force_reg (mmode,
-					gen_int_mode (1 << elt, mmode))));
+					gen_int_mode (HOST_WIDE_INT_1U << elt,
+						      mmode))));
     }
   else if (use_vec_merge)
     {
       tmp = gen_rtx_VEC_DUPLICATE (mode, val);
-      tmp = gen_rtx_VEC_MERGE (mode, tmp, target, GEN_INT (1 << elt));
+      tmp = gen_rtx_VEC_MERGE (mode, tmp, target,
+			       GEN_INT (HOST_WIDE_INT_1U << elt));
       emit_insn (gen_rtx_SET (target, tmp));
     }
   else
@@ -44177,7 +44179,7 @@  quarter:
 
       emit_move_insn (mem, target);
 
-      tmp = adjust_address (mem, inner_mode, elt*GET_MODE_SIZE (inner_mode));
+      tmp = adjust_address (mem, inner_mode, elt * GET_MODE_SIZE (inner_mode));
       emit_move_insn (tmp, val);
 
       emit_move_insn (target, mem);
--- gcc/testsuite/gcc.c-torture/execute/pr85169.c.jj	2018-04-03 12:46:25.167770124 +0200
+++ gcc/testsuite/gcc.c-torture/execute/pr85169.c	2018-04-03 12:45:23.637725937 +0200
@@ -0,0 +1,22 @@ 
+/* PR target/85169 */
+
+typedef char V __attribute__((vector_size (64)));
+
+static void __attribute__ ((noipa))
+foo (V *p)
+{
+  V v = *p;
+  v[63] = 1;
+  *p = v;
+}
+
+int
+main ()
+{
+  V v = (V) { };
+  foo (&v);
+  for (unsigned i = 0; i < 64; i++)
+    if (v[i] != (i == 63))
+      __builtin_abort ();
+  return 0;
+}
--- gcc/testsuite/gcc.target/i386/avx512f-pr85169.c.jj	2018-04-03 12:47:03.686797782 +0200
+++ gcc/testsuite/gcc.target/i386/avx512f-pr85169.c	2018-04-03 12:47:36.075821048 +0200
@@ -0,0 +1,18 @@ 
+/* PR target/85169 */
+/* { dg-do run { target avx512f } } */
+/* { dg-options "-O2 -mavx512f" } */
+
+#include "avx512f-check.h"
+
+int do_main (void);
+
+static void
+avx512f_test (void)
+{
+  do_main ();
+}
+
+#undef main
+#define main() do_main ()
+
+#include "../../gcc.c-torture/execute/pr85169.c"
--- gcc/testsuite/gcc.target/i386/avx512bw-pr85169.c.jj	2018-04-03 12:47:59.394837794 +0200
+++ gcc/testsuite/gcc.target/i386/avx512bw-pr85169.c	2018-04-03 12:48:09.441845006 +0200
@@ -0,0 +1,18 @@ 
+/* PR target/85169 */
+/* { dg-do run { target avx512bw } } */
+/* { dg-options "-O2 -mavx512bw" } */
+
+#include "avx512bw-check.h"
+
+int do_main (void);
+
+static void
+avx512bw_test (void)
+{
+  do_main ();
+}
+
+#undef main
+#define main() do_main ()
+
+#include "../../gcc.c-torture/execute/pr85169.c"