From patchwork Wed Mar 28 17:46:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: 'Manivannan Sadhasivam' X-Patchwork-Id: 892400 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="ild1LgGf"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40BFrD2BN7z9s0p for ; Thu, 29 Mar 2018 04:54:20 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753229AbeC1RyS (ORCPT ); Wed, 28 Mar 2018 13:54:18 -0400 Received: from mail-pg0-f65.google.com ([74.125.83.65]:37931 "EHLO mail-pg0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753232AbeC1RyP (ORCPT ); Wed, 28 Mar 2018 13:54:15 -0400 Received: by mail-pg0-f65.google.com with SMTP id a15so1246906pgn.5 for ; Wed, 28 Mar 2018 10:54:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=jLdZFBFUyckKPEbJXNCeaJgwrec114GPO6CefOxXRBk=; b=ild1LgGf11mdHW1CD0SS74Bxn1RYfFET2jt7/JQX8ZFDJa2gPQK1J2S1bDxuwxGgP9 v/tqEWvBvdSkB22tdwJ94iKq9FpiO0bEAEEsgaFW2H/NEvsbC3gZh0555JwpY1Hnwqcy vUwMcvbdpFYuc9JBdnibWxsdIdFa9mJAA9zSg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jLdZFBFUyckKPEbJXNCeaJgwrec114GPO6CefOxXRBk=; b=DX1ZrscFl7ovg5t2QH9UN8TycBlVg7a8s0cNTTVGZ+0IMC7isk/bAEx2hqciyD56jM iGh75KSA7qp0vpUNT5EMdf99n2TK9KCNU8/jn+uxwu4YA/wNuSRKMQ/nZWi1lN8enbH9 uek3kktWfZwHTNvxqXWypcGnU/hcLUGkQrzwTIVPUienYIg1cg43BU54CoRwalEN9uXo lJqn9kqO5jXadZWE0bQAQvXoAJAslbrUgmfGWgduCW9EKcW/g0s3tw5NzJi7QwpciTHz 5SVIl0z2YdsL7zywr0/nEDDaSAczB/DQDOy1fWci0B/9q5vyQjIrQzAaxxkelyqdPBlH LEXA== X-Gm-Message-State: AElRT7Exltyu5vZuCFbQbzSi3qQwUvn5D0ic2rNtrp4XyRYMOf5gbrVs PE0UKL8thzoGDM/DrJr0onJH X-Google-Smtp-Source: AIpwx49b9LeuG9KlRgWo3A9ONkRnrA52mCPHjlMbDc34OIc8W6CkmOGWAp3Ux83raMwwTsAOaZMZDg== X-Received: by 10.99.149.21 with SMTP id p21mr3248076pgd.154.1522259654286; Wed, 28 Mar 2018 10:54:14 -0700 (PDT) Received: from localhost.localdomain ([2405:204:70c6:7103:1d04:9825:cfd:7751]) by smtp.gmail.com with ESMTPSA id j21sm7404446pgn.61.2018.03.28.10.54.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Mar 2018 10:54:13 -0700 (PDT) From: Manivannan Sadhasivam To: linus.walleij@linaro.org, robh+dt@kernel.org, afaerber@suse.de Cc: liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, andy.shevchenko@gmail.com, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, manivannanece23@gmail.com, Manivannan Sadhasivam Subject: [PATCH v6 4/9] dt-bindings: gpio: Add gpio nodes for Actions S900 SoC Date: Wed, 28 Mar 2018 23:16:58 +0530 Message-Id: <20180328174703.19778-5-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180328174703.19778-1-manivannan.sadhasivam@linaro.org> References: <20180328174703.19778-1-manivannan.sadhasivam@linaro.org> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add gpio nodes for Actions Semi S900 SoC. Signed-off-by: Manivannan Sadhasivam --- .../devicetree/bindings/gpio/actions,owl-gpio.txt | 87 ++++++++++++++++++++++ 1 file changed, 87 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt diff --git a/Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt b/Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt new file mode 100644 index 000000000000..34283e9195ea --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt @@ -0,0 +1,87 @@ +* Actions Semi OWL GPIO controller bindings + +The GPIOs are organized as individual banks/ports with variable number +of GPIOs. Each bank is represented as an individual GPIO controller. + +Required properties: +- compatible : Should be "actions,s900-gpio" +- reg : Address and range of the GPIO controller registers. +- gpio-controller : Marks the device node as a GPIO controller. +- #gpio-cells : Should be <2>. The first cell is the gpio number + and the second cell is used to specify optional + parameters. +- ngpios : Specifies the number of GPIO lines. +- interrupt-controller : Marks the device node as an interrupt controller. +- #interrupt-cells : Specifies the number of cells needed to encode an + interrupt. Shall be set to 2. The first cell + defines the interrupt number, the second encodes + the trigger flags described in + bindings/interrupt-controller/interrupts.txt + +Optional properties: +- gpio-ranges : Mapping between GPIO and pinctrl + +Examples: + + gpioa: gpio@e01b0000 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0000 0x0 0x000c>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 32>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpiob: gpio@e01b000c { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b000c 0x0 0x000c>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 32 32>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpioc: gpio@e01b0018 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0018 0x0 0x000c>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 64 12>; + ngpios = <12>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpiod: gpio@e01b0024 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0024 0x0 0x000c>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 76 30>; + ngpios = <30>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpioe: gpio@e01b0030 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0030 0x0 0x000c>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 106 32>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpiof: gpio@e01b00f0 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b00f0 0x0 0x000c>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 138 8>; + ngpios = <8>; + interrupt-controller; + #interrupt-cells = <2>; + };