From patchwork Wed Mar 28 14:22:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Greg Ungerer X-Patchwork-Id: 892233 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:e::133; helo=bombadil.infradead.org; envelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux-m68k.org Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="SYxHg3Na"; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:e::133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 40B98b42Snz9s0m for ; Thu, 29 Mar 2018 01:23:11 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=1aJN4lW9DbfOEkQpcxorjTxDiJtve0lqjiwQsYp2BVM=; b=SYxHg3NaJf+U41 omYEe8SmiOPVRBaLC8LCJQtznE87oKqMFnbWt34GlJ5W0WA46I/aShPpEj0ESpiMACmuOaqWuXJKQ 3eRu6NKdI1lcTQgt/LEyRSwCCaNdyFQU+9owscQeZaGWuJ6Nj9YVBy3dHpuDFFviWz8+jtvMZTdG1 MsClqSTRlobqbq4mZrFZCv2oGIKYcrqEL6//N+1hc/TUZWidgdycxTf03qZvcZKU278C9HiCtZTgh CDmDE9ms1cY2kR8If8xb9pCq2CeoGpzjJ5Ywr2Z26hH7GU17Mi4STspSRGhI71voPX7bYty+ZxFmz /JTrFu1br3oqHGAt9KaA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1f1Byl-0007gR-JT; Wed, 28 Mar 2018 14:23:07 +0000 Received: from icp-osb-irony-out2.external.iinet.net.au ([203.59.1.155]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1f1Byg-0007df-1g for linux-arm-kernel@lists.infradead.org; Wed, 28 Mar 2018 14:23:03 +0000 X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: A2BgAgDdpLta/zXSMGddHAEBAQQBAQoBAYNBgVAogxVHiACNAUUBAQEBAQEGgTR+kkqBeh6EcYQPITQYAQIBAQEBAQECayiFTw8BRigNAhgOAmAShQEMq16CHBoChDmDb4IpgQiEN4IagQyBB4t/glQClzMHAY4qh02EYpEcHDiBUjMaCCgIgn2QXy0wj20BAQ X-IPAS-Result: A2BgAgDdpLta/zXSMGddHAEBAQQBAQoBAYNBgVAogxVHiACNAUUBAQEBAQEGgTR+kkqBeh6EcYQPITQYAQIBAQEBAQECayiFTw8BRigNAhgOAmAShQEMq16CHBoChDmDb4IpgQiEN4IagQyBB4t/glQClzMHAY4qh02EYpEcHDiBUjMaCCgIgn2QXy0wj20BAQ X-IronPort-AV: E=Sophos;i="5.48,371,1517846400"; d="scan'208";a="54376187" Received: from unknown (HELO goober.accelecon.com) ([103.48.210.53]) by icp-osb-irony-out2.iinet.net.au with ESMTP; 28 Mar 2018 22:22:26 +0800 From: Greg Ungerer To: shawnguo@kernel.org, kernel@pengutronix.de, fabio.estevam@nxp.com Subject: [PATCHv2] ARM: dts: imx6ull: add UART5 input select register definitions Date: Thu, 29 Mar 2018 00:22:23 +1000 Message-Id: <1522246943-2269-1-git-send-email-gerg@linux-m68k.org> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180328_072302_292383_B235550C X-CRM114-Status: UNSURE ( 7.62 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.4.1 on bombadil.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [203.59.1.155 listed in list.dnswl.org] X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Greg Ungerer , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org The iMX6ULL UART5_RX_DATA_SELECT_INPUT DAISY Register has some different bit definitions to that same register in the iMX6UL. The bits for the iMX6UL: 000 CSI_DATA00_ALT8 — Selecting Pad: CSI_DATA00 for Mode: ALT8 001 CSI_DATA01_ALT8 — Selecting Pad: CSI_DATA01 for Mode: ALT8 010 GPIO1_IO04_ALT8 — Selecting Pad: GPIO1_IO04 for Mode: ALT8 011 GPIO1_IO05_ALT8 — Selecting Pad: GPIO1_IO05 for Mode: ALT 100 UART5_TX_DATA_ALT0 — Selecting Pad: UART5_TX_DATA for Mode: ALT 101 UART5_RX_DATA_ALT0 — Selecting Pad: UART5_RX_DATA for Mode: ALT But for the iMX6ULL: 000 CSI_DATA00_ALT8 — Selecting Pad: CSI_DATA00 for Mode: ALT8 001 CSI_DATA01_ALT8 — Selecting Pad: CSI_DATA01 for Mode: ALT8 010 GPIO1_IO04_ALT8 — Selecting Pad: GPIO1_IO04 for Mode: ALT8 011 GPIO1_IO05_ALT8 — Selecting Pad: GPIO1_IO05 for Mode: ALT 100 UART1_TX_DATA_ALT9 — Selecting Pad: UART1_TX_DATA for Mode: ALT9 101 UART1_RX_DATA_ALT9 — Selecting Pad: UART1_RX_DATA for Mode: ALT9 110 UART5_TX_DATA_ALT0 — Selecting Pad: UART5_TX_DATA for Mode: ALT0 111 UART5_RX_DATA_ALT0 — Selecting Pad: UART5_RX_DATA for Mode: ALT0 Specifically for a board I am working on with the serial console on UART5 I need to be able to enable UART5_RX_DATA_ALT0 mode. There is no definition for the iMX6ULL version of that in imx6ul-pinfunc.h or imx6ull-pinfunc.h. Add definitions for the missing UART5 input select register bits of the iMX6ULL. Signed-off-by: Greg Ungerer Acked-by: Stefan Wahren --- arch/arm/boot/dts/imx6ull-pinfunc.h | 4 ++++ 1 file changed, 4 insertions(+) v2: add definitions for all missing bits diff --git a/arch/arm/boot/dts/imx6ull-pinfunc.h b/arch/arm/boot/dts/imx6ull-pinfunc.h index 1182023..090846b 100644 --- a/arch/arm/boot/dts/imx6ull-pinfunc.h +++ b/arch/arm/boot/dts/imx6ull-pinfunc.h @@ -14,6 +14,10 @@ * The pin function ID is a tuple of * */ +#define MX6ULL_PAD_UART1_TX_DATA__UART5_DTE_RX 0x0084 0x0310 0x0644 0x9 0x4 +#define MX6ULL_PAD_UART1_RX_DATA__UART5_DCE_RX 0x0088 0x0314 0x0644 0x9 0x5 +#define MX6ULL_PAD_UART5_TX_DATA__UART5_DTE_RX 0x00BC 0x0348 0x0644 0x0 0x6 +#define MX6ULL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x00C0 0x034C 0x0644 0x0 0x7 #define MX6ULL_PAD_ENET2_RX_DATA0__EPDC_SDDO08 0x00E4 0x0370 0x0000 0x9 0x0 #define MX6ULL_PAD_ENET2_RX_DATA1__EPDC_SDDO09 0x00E8 0x0374 0x0000 0x9 0x0 #define MX6ULL_PAD_ENET2_RX_EN__EPDC_SDDO10 0x00EC 0x0378 0x0000 0x9 0x0