ARM: dts: imx6ull: add UART5 input select register definition

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  • ARM: dts: imx6ull: add UART5 input select register definition
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Commit Message

Greg Ungerer March 27, 2018, 10:24 p.m.
The iMX6ULL UART5_RX_DATA_SELECT_INPUT DAISY Register has some different
bit definitions to that same register in the iMX6UL.

The bits for the iMX6UL:

000 CSI_DATA00_ALT8 — Selecting Pad: CSI_DATA00 for Mode: ALT8
001 CSI_DATA01_ALT8 — Selecting Pad: CSI_DATA01 for Mode: ALT8
010 GPIO1_IO04_ALT8 — Selecting Pad: GPIO1_IO04 for Mode: ALT8
011 GPIO1_IO05_ALT8 — Selecting Pad: GPIO1_IO05 for Mode: ALT
100 UART5_TX_DATA_ALT0 — Selecting Pad: UART5_TX_DATA for Mode: ALT
101 UART5_RX_DATA_ALT0 — Selecting Pad: UART5_RX_DATA for Mode: ALT

But for the iMX6ULL:

000 CSI_DATA00_ALT8 — Selecting Pad: CSI_DATA00 for Mode: ALT8
001 CSI_DATA01_ALT8 — Selecting Pad: CSI_DATA01 for Mode: ALT8
010 GPIO1_IO04_ALT8 — Selecting Pad: GPIO1_IO04 for Mode: ALT8
011 GPIO1_IO05_ALT8 — Selecting Pad: GPIO1_IO05 for Mode: ALT
100 UART1_TX_DATA_ALT9 — Selecting Pad: UART1_TX_DATA for Mode: ALT9
101 UART1_RX_DATA_ALT9 — Selecting Pad: UART1_RX_DATA for Mode: ALT9
110 UART5_TX_DATA_ALT0 — Selecting Pad: UART5_TX_DATA for Mode: ALT0
111 UART5_RX_DATA_ALT0 — Selecting Pad: UART5_RX_DATA for Mode: ALT0

Specifically for a board I am working on with the serial console on UART5
I need to be able to enable UART5_RX_DATA_ALT0 mode. There is no definition
for the iMX6ULL version of that in imx6ul-pinfunc.h or imx6ull-pinfunc.h.

Create a new definition specific to the iMX6ULL so that is settable.

Signed-off-by: Greg Ungerer <gerg@linux-m68k.org>
---
 arch/arm/boot/dts/imx6ull-pinfunc.h | 1 +
 1 file changed, 1 insertion(+)

Comments

Fabio Estevam March 27, 2018, 10:45 p.m. | #1
On Tue, Mar 27, 2018 at 7:24 PM, Greg Ungerer <gerg@linux-m68k.org> wrote:
> The iMX6ULL UART5_RX_DATA_SELECT_INPUT DAISY Register has some different
> bit definitions to that same register in the iMX6UL.
>
> The bits for the iMX6UL:
>
> 000 CSI_DATA00_ALT8 — Selecting Pad: CSI_DATA00 for Mode: ALT8
> 001 CSI_DATA01_ALT8 — Selecting Pad: CSI_DATA01 for Mode: ALT8
> 010 GPIO1_IO04_ALT8 — Selecting Pad: GPIO1_IO04 for Mode: ALT8
> 011 GPIO1_IO05_ALT8 — Selecting Pad: GPIO1_IO05 for Mode: ALT
> 100 UART5_TX_DATA_ALT0 — Selecting Pad: UART5_TX_DATA for Mode: ALT
> 101 UART5_RX_DATA_ALT0 — Selecting Pad: UART5_RX_DATA for Mode: ALT
>
> But for the iMX6ULL:
>
> 000 CSI_DATA00_ALT8 — Selecting Pad: CSI_DATA00 for Mode: ALT8
> 001 CSI_DATA01_ALT8 — Selecting Pad: CSI_DATA01 for Mode: ALT8
> 010 GPIO1_IO04_ALT8 — Selecting Pad: GPIO1_IO04 for Mode: ALT8
> 011 GPIO1_IO05_ALT8 — Selecting Pad: GPIO1_IO05 for Mode: ALT
> 100 UART1_TX_DATA_ALT9 — Selecting Pad: UART1_TX_DATA for Mode: ALT9
> 101 UART1_RX_DATA_ALT9 — Selecting Pad: UART1_RX_DATA for Mode: ALT9
> 110 UART5_TX_DATA_ALT0 — Selecting Pad: UART5_TX_DATA for Mode: ALT0
> 111 UART5_RX_DATA_ALT0 — Selecting Pad: UART5_RX_DATA for Mode: ALT0
>
> Specifically for a board I am working on with the serial console on UART5
> I need to be able to enable UART5_RX_DATA_ALT0 mode. There is no definition
> for the iMX6ULL version of that in imx6ul-pinfunc.h or imx6ull-pinfunc.h.
>
> Create a new definition specific to the iMX6ULL so that is settable.
>
> Signed-off-by: Greg Ungerer <gerg@linux-m68k.org>

Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Stefan Wahren March 28, 2018, 6:47 a.m. | #2
Hi Greg,

Am 28.03.2018 um 00:24 schrieb Greg Ungerer:
> The iMX6ULL UART5_RX_DATA_SELECT_INPUT DAISY Register has some different
> bit definitions to that same register in the iMX6UL.
>
> The bits for the iMX6UL:
>
> 000 CSI_DATA00_ALT8 — Selecting Pad: CSI_DATA00 for Mode: ALT8
> 001 CSI_DATA01_ALT8 — Selecting Pad: CSI_DATA01 for Mode: ALT8
> 010 GPIO1_IO04_ALT8 — Selecting Pad: GPIO1_IO04 for Mode: ALT8
> 011 GPIO1_IO05_ALT8 — Selecting Pad: GPIO1_IO05 for Mode: ALT
> 100 UART5_TX_DATA_ALT0 — Selecting Pad: UART5_TX_DATA for Mode: ALT
> 101 UART5_RX_DATA_ALT0 — Selecting Pad: UART5_RX_DATA for Mode: ALT
>
> But for the iMX6ULL:
>
> 000 CSI_DATA00_ALT8 — Selecting Pad: CSI_DATA00 for Mode: ALT8
> 001 CSI_DATA01_ALT8 — Selecting Pad: CSI_DATA01 for Mode: ALT8
> 010 GPIO1_IO04_ALT8 — Selecting Pad: GPIO1_IO04 for Mode: ALT8
> 011 GPIO1_IO05_ALT8 — Selecting Pad: GPIO1_IO05 for Mode: ALT
> 100 UART1_TX_DATA_ALT9 — Selecting Pad: UART1_TX_DATA for Mode: ALT9
> 101 UART1_RX_DATA_ALT9 — Selecting Pad: UART1_RX_DATA for Mode: ALT9
> 110 UART5_TX_DATA_ALT0 — Selecting Pad: UART5_TX_DATA for Mode: ALT0
> 111 UART5_RX_DATA_ALT0 — Selecting Pad: UART5_RX_DATA for Mode: ALT0
>
> Specifically for a board I am working on with the serial console on UART5
> I need to be able to enable UART5_RX_DATA_ALT0 mode. There is no definition
> for the iMX6ULL version of that in imx6ul-pinfunc.h or imx6ull-pinfunc.h.
>
> Create a new definition specific to the iMX6ULL so that is settable.
>
> Signed-off-by: Greg Ungerer <gerg@linux-m68k.org>
> ---
>  arch/arm/boot/dts/imx6ull-pinfunc.h | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/boot/dts/imx6ull-pinfunc.h b/arch/arm/boot/dts/imx6ull-pinfunc.h
> index 1182023..19100b5 100644
> --- a/arch/arm/boot/dts/imx6ull-pinfunc.h
> +++ b/arch/arm/boot/dts/imx6ull-pinfunc.h
> @@ -14,6 +14,7 @@
>   * The pin function ID is a tuple of
>   * <mux_reg conf_reg input_reg mux_mode input_val>
>   */
> +#define MX6ULL_PAD_UART5_RX_DATA__UART5_DCE_RX                    0x00C0 0x034C 0x0644 0x0 0x7

since you mentioned the differences above, could you please add them all?

Thanks
Stefan

>  #define MX6ULL_PAD_ENET2_RX_DATA0__EPDC_SDDO08                    0x00E4 0x0370 0x0000 0x9 0x0
>  #define MX6ULL_PAD_ENET2_RX_DATA1__EPDC_SDDO09                    0x00E8 0x0374 0x0000 0x9 0x0
>  #define MX6ULL_PAD_ENET2_RX_EN__EPDC_SDDO10                       0x00EC 0x0378 0x0000 0x9 0x0
Greg Ungerer March 28, 2018, 2:19 p.m. | #3
Hi Stefan,

On 28/03/18 16:47, Stefan Wahren wrote:
> Am 28.03.2018 um 00:24 schrieb Greg Ungerer:
>> The iMX6ULL UART5_RX_DATA_SELECT_INPUT DAISY Register has some different
>> bit definitions to that same register in the iMX6UL.
>>
>> The bits for the iMX6UL:
>>
>> 000 CSI_DATA00_ALT8 — Selecting Pad: CSI_DATA00 for Mode: ALT8
>> 001 CSI_DATA01_ALT8 — Selecting Pad: CSI_DATA01 for Mode: ALT8
>> 010 GPIO1_IO04_ALT8 — Selecting Pad: GPIO1_IO04 for Mode: ALT8
>> 011 GPIO1_IO05_ALT8 — Selecting Pad: GPIO1_IO05 for Mode: ALT
>> 100 UART5_TX_DATA_ALT0 — Selecting Pad: UART5_TX_DATA for Mode: ALT
>> 101 UART5_RX_DATA_ALT0 — Selecting Pad: UART5_RX_DATA for Mode: ALT
>>
>> But for the iMX6ULL:
>>
>> 000 CSI_DATA00_ALT8 — Selecting Pad: CSI_DATA00 for Mode: ALT8
>> 001 CSI_DATA01_ALT8 — Selecting Pad: CSI_DATA01 for Mode: ALT8
>> 010 GPIO1_IO04_ALT8 — Selecting Pad: GPIO1_IO04 for Mode: ALT8
>> 011 GPIO1_IO05_ALT8 — Selecting Pad: GPIO1_IO05 for Mode: ALT
>> 100 UART1_TX_DATA_ALT9 — Selecting Pad: UART1_TX_DATA for Mode: ALT9
>> 101 UART1_RX_DATA_ALT9 — Selecting Pad: UART1_RX_DATA for Mode: ALT9
>> 110 UART5_TX_DATA_ALT0 — Selecting Pad: UART5_TX_DATA for Mode: ALT0
>> 111 UART5_RX_DATA_ALT0 — Selecting Pad: UART5_RX_DATA for Mode: ALT0
>>
>> Specifically for a board I am working on with the serial console on UART5
>> I need to be able to enable UART5_RX_DATA_ALT0 mode. There is no definition
>> for the iMX6ULL version of that in imx6ul-pinfunc.h or imx6ull-pinfunc.h.
>>
>> Create a new definition specific to the iMX6ULL so that is settable.
>>
>> Signed-off-by: Greg Ungerer <gerg@linux-m68k.org>
>> ---
>>   arch/arm/boot/dts/imx6ull-pinfunc.h | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/arch/arm/boot/dts/imx6ull-pinfunc.h b/arch/arm/boot/dts/imx6ull-pinfunc.h
>> index 1182023..19100b5 100644
>> --- a/arch/arm/boot/dts/imx6ull-pinfunc.h
>> +++ b/arch/arm/boot/dts/imx6ull-pinfunc.h
>> @@ -14,6 +14,7 @@
>>    * The pin function ID is a tuple of
>>    * <mux_reg conf_reg input_reg mux_mode input_val>
>>    */
>> +#define MX6ULL_PAD_UART5_RX_DATA__UART5_DCE_RX                    0x00C0 0x034C 0x0644 0x0 0x7
> 
> since you mentioned the differences above, could you please add them all?

Sure, will do.

Regards
Greg


> Thanks
> Stefan
> 
>>   #define MX6ULL_PAD_ENET2_RX_DATA0__EPDC_SDDO08                    0x00E4 0x0370 0x0000 0x9 0x0
>>   #define MX6ULL_PAD_ENET2_RX_DATA1__EPDC_SDDO09                    0x00E8 0x0374 0x0000 0x9 0x0
>>   #define MX6ULL_PAD_ENET2_RX_EN__EPDC_SDDO10                       0x00EC 0x0378 0x0000 0x9 0x0
> 
> 
>
Stefan Wahren March 29, 2018, 3:35 p.m. | #4
Am 28.03.2018 um 00:45 schrieb Fabio Estevam:
> On Tue, Mar 27, 2018 at 7:24 PM, Greg Ungerer <gerg@linux-m68k.org> wrote:
>> The iMX6ULL UART5_RX_DATA_SELECT_INPUT DAISY Register has some different
>> bit definitions to that same register in the iMX6UL.
>>
>> The bits for the iMX6UL:
>>
>> 000 CSI_DATA00_ALT8 — Selecting Pad: CSI_DATA00 for Mode: ALT8
>> 001 CSI_DATA01_ALT8 — Selecting Pad: CSI_DATA01 for Mode: ALT8
>> 010 GPIO1_IO04_ALT8 — Selecting Pad: GPIO1_IO04 for Mode: ALT8
>> 011 GPIO1_IO05_ALT8 — Selecting Pad: GPIO1_IO05 for Mode: ALT
>> 100 UART5_TX_DATA_ALT0 — Selecting Pad: UART5_TX_DATA for Mode: ALT
>> 101 UART5_RX_DATA_ALT0 — Selecting Pad: UART5_RX_DATA for Mode: ALT
>>
>> But for the iMX6ULL:
>>
>> 000 CSI_DATA00_ALT8 — Selecting Pad: CSI_DATA00 for Mode: ALT8
>> 001 CSI_DATA01_ALT8 — Selecting Pad: CSI_DATA01 for Mode: ALT8
>> 010 GPIO1_IO04_ALT8 — Selecting Pad: GPIO1_IO04 for Mode: ALT8
>> 011 GPIO1_IO05_ALT8 — Selecting Pad: GPIO1_IO05 for Mode: ALT
>> 100 UART1_TX_DATA_ALT9 — Selecting Pad: UART1_TX_DATA for Mode: ALT9
>> 101 UART1_RX_DATA_ALT9 — Selecting Pad: UART1_RX_DATA for Mode: ALT9
>> 110 UART5_TX_DATA_ALT0 — Selecting Pad: UART5_TX_DATA for Mode: ALT0
>> 111 UART5_RX_DATA_ALT0 — Selecting Pad: UART5_RX_DATA for Mode: ALT0
>>
>> Specifically for a board I am working on with the serial console on UART5
>> I need to be able to enable UART5_RX_DATA_ALT0 mode. There is no definition
>> for the iMX6ULL version of that in imx6ul-pinfunc.h or imx6ull-pinfunc.h.
>>
>> Create a new definition specific to the iMX6ULL so that is settable.
>>
>> Signed-off-by: Greg Ungerer <gerg@linux-m68k.org>
> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>

I'm okay with the second version of the patch, but i noticed that at 
least UART5_RTS_B_SELECT_INPUT is also affected.

The bits for the iMX6UL:

000 CSI_DATA03_ALT8 — Selecting Pad: CSI_DATA03 for Mode: ALT8
001 GPIO1_IO08_ALT8 — Selecting Pad: GPIO1_IO08 for Mode: ALT8
010 GPIO1_IO09_ALT8 — Selecting Pad: GPIO1_IO09 for Mode: ALT8
011 ENET1_RX_EN_ALT1 — Selecting Pad: ENET1_RX_EN for Mode: ALT1
100 ENET1_TX_DATA0_ALT1 — Selecting Pad: ENET1_TX_DATA0 for Mode: ALT1
101 CSI_DATA02_ALT8 — Selecting Pad: CSI_DATA02 for Mode: ALT8

But for the iMX6ULL:

000 CSI_DATA03_ALT8 — Selecting Pad: CSI_DATA03 for Mode: ALT8
001 GPIO1_IO08_ALT8 — Selecting Pad: GPIO1_IO08 for Mode: ALT8
010 GPIO1_IO09_ALT8 — Selecting Pad: GPIO1_IO09 for Mode: ALT8
011 UART1_CTS_B_ALT9 — Selecting Pad: UART1_CTS_B for Mode: ALT9
100 UART1_RTS_B_ALT9 — Selecting Pad: UART1_RTS_B for Mode: ALT9
101 ENET1_RX_EN_ALT1 — Selecting Pad: ENET1_RX_EN for Mode: ALT1
110 ENET1_TX_DATA0_ALT1 — Selecting Pad: ENET1_TX_DATA0 for Mode: ALT1
111 CSI_DATA02_ALT8 — Selecting Pad: CSI_DATA02 for Mode: ALT8

Comparing the datasheets isn't fun ...

Should i provide a patch for this or is there a easier way to figure out 
all the differences?

Best regards
Stefan
Stefan Wahren April 16, 2018, 8:17 a.m. | #5
Am 29.03.2018 um 17:35 schrieb Stefan Wahren:
> Am 28.03.2018 um 00:45 schrieb Fabio Estevam:
>> On Tue, Mar 27, 2018 at 7:24 PM, Greg Ungerer <gerg@linux-m68k.org> 
>> wrote:
>>> The iMX6ULL UART5_RX_DATA_SELECT_INPUT DAISY Register has some 
>>> different
>>> bit definitions to that same register in the iMX6UL.
>>>
>>> The bits for the iMX6UL:
>>>
>>> 000 CSI_DATA00_ALT8 — Selecting Pad: CSI_DATA00 for Mode: ALT8
>>> 001 CSI_DATA01_ALT8 — Selecting Pad: CSI_DATA01 for Mode: ALT8
>>> 010 GPIO1_IO04_ALT8 — Selecting Pad: GPIO1_IO04 for Mode: ALT8
>>> 011 GPIO1_IO05_ALT8 — Selecting Pad: GPIO1_IO05 for Mode: ALT
>>> 100 UART5_TX_DATA_ALT0 — Selecting Pad: UART5_TX_DATA for Mode: ALT
>>> 101 UART5_RX_DATA_ALT0 — Selecting Pad: UART5_RX_DATA for Mode: ALT
>>>
>>> But for the iMX6ULL:
>>>
>>> 000 CSI_DATA00_ALT8 — Selecting Pad: CSI_DATA00 for Mode: ALT8
>>> 001 CSI_DATA01_ALT8 — Selecting Pad: CSI_DATA01 for Mode: ALT8
>>> 010 GPIO1_IO04_ALT8 — Selecting Pad: GPIO1_IO04 for Mode: ALT8
>>> 011 GPIO1_IO05_ALT8 — Selecting Pad: GPIO1_IO05 for Mode: ALT
>>> 100 UART1_TX_DATA_ALT9 — Selecting Pad: UART1_TX_DATA for Mode: ALT9
>>> 101 UART1_RX_DATA_ALT9 — Selecting Pad: UART1_RX_DATA for Mode: ALT9
>>> 110 UART5_TX_DATA_ALT0 — Selecting Pad: UART5_TX_DATA for Mode: ALT0
>>> 111 UART5_RX_DATA_ALT0 — Selecting Pad: UART5_RX_DATA for Mode: ALT0
>>>
>>> Specifically for a board I am working on with the serial console on 
>>> UART5
>>> I need to be able to enable UART5_RX_DATA_ALT0 mode. There is no 
>>> definition
>>> for the iMX6ULL version of that in imx6ul-pinfunc.h or 
>>> imx6ull-pinfunc.h.
>>>
>>> Create a new definition specific to the iMX6ULL so that is settable.
>>>
>>> Signed-off-by: Greg Ungerer <gerg@linux-m68k.org>
>> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
>
> I'm okay with the second version of the patch, but i noticed that at 
> least UART5_RTS_B_SELECT_INPUT is also affected.
>
> The bits for the iMX6UL:
>
> 000 CSI_DATA03_ALT8 — Selecting Pad: CSI_DATA03 for Mode: ALT8
> 001 GPIO1_IO08_ALT8 — Selecting Pad: GPIO1_IO08 for Mode: ALT8
> 010 GPIO1_IO09_ALT8 — Selecting Pad: GPIO1_IO09 for Mode: ALT8
> 011 ENET1_RX_EN_ALT1 — Selecting Pad: ENET1_RX_EN for Mode: ALT1
> 100 ENET1_TX_DATA0_ALT1 — Selecting Pad: ENET1_TX_DATA0 for Mode: ALT1
> 101 CSI_DATA02_ALT8 — Selecting Pad: CSI_DATA02 for Mode: ALT8
>
> But for the iMX6ULL:
>
> 000 CSI_DATA03_ALT8 — Selecting Pad: CSI_DATA03 for Mode: ALT8
> 001 GPIO1_IO08_ALT8 — Selecting Pad: GPIO1_IO08 for Mode: ALT8
> 010 GPIO1_IO09_ALT8 — Selecting Pad: GPIO1_IO09 for Mode: ALT8
> 011 UART1_CTS_B_ALT9 — Selecting Pad: UART1_CTS_B for Mode: ALT9
> 100 UART1_RTS_B_ALT9 — Selecting Pad: UART1_RTS_B for Mode: ALT9
> 101 ENET1_RX_EN_ALT1 — Selecting Pad: ENET1_RX_EN for Mode: ALT1
> 110 ENET1_TX_DATA0_ALT1 — Selecting Pad: ENET1_TX_DATA0 for Mode: ALT1
> 111 CSI_DATA02_ALT8 — Selecting Pad: CSI_DATA02 for Mode: ALT8
>
> Comparing the datasheets isn't fun ...
>
> Should i provide a patch for this or is there a easier way to figure 
> out all the differences?

gentle ping ...
Shawn Guo April 18, 2018, 3:08 a.m. | #6
On Mon, Apr 16, 2018 at 10:17:14AM +0200, Stefan Wahren wrote:
> >I'm okay with the second version of the patch, but i noticed that
> >at least UART5_RTS_B_SELECT_INPUT is also affected.
> >
> >The bits for the iMX6UL:
> >
> >000 CSI_DATA03_ALT8 — Selecting Pad: CSI_DATA03 for Mode: ALT8
> >001 GPIO1_IO08_ALT8 — Selecting Pad: GPIO1_IO08 for Mode: ALT8
> >010 GPIO1_IO09_ALT8 — Selecting Pad: GPIO1_IO09 for Mode: ALT8
> >011 ENET1_RX_EN_ALT1 — Selecting Pad: ENET1_RX_EN for Mode: ALT1
> >100 ENET1_TX_DATA0_ALT1 — Selecting Pad: ENET1_TX_DATA0 for Mode: ALT1
> >101 CSI_DATA02_ALT8 — Selecting Pad: CSI_DATA02 for Mode: ALT8
> >
> >But for the iMX6ULL:
> >
> >000 CSI_DATA03_ALT8 — Selecting Pad: CSI_DATA03 for Mode: ALT8
> >001 GPIO1_IO08_ALT8 — Selecting Pad: GPIO1_IO08 for Mode: ALT8
> >010 GPIO1_IO09_ALT8 — Selecting Pad: GPIO1_IO09 for Mode: ALT8
> >011 UART1_CTS_B_ALT9 — Selecting Pad: UART1_CTS_B for Mode: ALT9
> >100 UART1_RTS_B_ALT9 — Selecting Pad: UART1_RTS_B for Mode: ALT9
> >101 ENET1_RX_EN_ALT1 — Selecting Pad: ENET1_RX_EN for Mode: ALT1
> >110 ENET1_TX_DATA0_ALT1 — Selecting Pad: ENET1_TX_DATA0 for Mode: ALT1
> >111 CSI_DATA02_ALT8 — Selecting Pad: CSI_DATA02 for Mode: ALT8
> >
> >Comparing the datasheets isn't fun ...
> >
> >Should i provide a patch for this or is there a easier way to
> >figure out all the differences?
> 
> gentle ping ...

You're welcomed to send a patch for that.

Shawn

Patch

diff --git a/arch/arm/boot/dts/imx6ull-pinfunc.h b/arch/arm/boot/dts/imx6ull-pinfunc.h
index 1182023..19100b5 100644
--- a/arch/arm/boot/dts/imx6ull-pinfunc.h
+++ b/arch/arm/boot/dts/imx6ull-pinfunc.h
@@ -14,6 +14,7 @@ 
  * The pin function ID is a tuple of
  * <mux_reg conf_reg input_reg mux_mode input_val>
  */
+#define MX6ULL_PAD_UART5_RX_DATA__UART5_DCE_RX                    0x00C0 0x034C 0x0644 0x0 0x7
 #define MX6ULL_PAD_ENET2_RX_DATA0__EPDC_SDDO08                    0x00E4 0x0370 0x0000 0x9 0x0
 #define MX6ULL_PAD_ENET2_RX_DATA1__EPDC_SDDO09                    0x00E8 0x0374 0x0000 0x9 0x0
 #define MX6ULL_PAD_ENET2_RX_EN__EPDC_SDDO10                       0x00EC 0x0378 0x0000 0x9 0x0