@@ -1,11 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Clock specification for Xilinx ZynqMP
*
* (C) Copyright 2017, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
/ {
@@ -1,11 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Clock specification for Xilinx ZynqMP
*
- * (C) Copyright 2015, Xilinx, Inc.
+ * (C) Copyright 2015 - 2018, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
/ {
@@ -1,11 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP zc1751-xm015-dc1
*
- * (C) Copyright 2015, Xilinx, Inc.
+ * (C) Copyright 2015 - 2018, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
@@ -1,11 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP zc1751-xm016-dc2
*
- * (C) Copyright 2015, Xilinx, Inc.
+ * (C) Copyright 2015 - 2018, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
@@ -1,11 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP zc1751-xm018-dc4
*
- * (C) Copyright 2015 - 2016, Xilinx, Inc.
+ * (C) Copyright 2015 - 2018, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
@@ -1,12 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP zc1751-xm019-dc5
*
- * (C) Copyright 2015, Xilinx, Inc.
+ * (C) Copyright 2015 - 2018, Xilinx, Inc.
*
* Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
* Michal Simek <michal.simek@xilinx.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
@@ -1,11 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP ZCU102 Rev1.0
*
- * (C) Copyright 2016, Xilinx, Inc.
+ * (C) Copyright 2016 - 2018, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include "zynqmp-zcu102-revB.dts"
@@ -1,11 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP ZCU102 RevA
*
- * (C) Copyright 2015, Xilinx, Inc.
+ * (C) Copyright 2015 - 2018, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
@@ -1,11 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP ZCU102 RevB
*
- * (C) Copyright 2016, Xilinx, Inc.
+ * (C) Copyright 2016 - 2018, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include "zynqmp-zcu102-revA.dts"
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP
*
@@ -5,7 +6,10 @@
*
* Michal Simek <michal.simek@xilinx.com>
*
- * SPDX-License-Identifier: GPL-2.0+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
*/
/ {
Mainline Linux kernel has adopted SPDX header license in a different format then was used before. This patch is syncing it up. Also update years in License text and remove Nathalie's email because it is no longer valid. Signed-off-by: Michal Simek <michal.simek@xilinx.com> --- arch/arm/dts/zynqmp-clk-ccf.dtsi | 3 +-- arch/arm/dts/zynqmp-clk.dtsi | 5 ++--- arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 5 ++--- arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 5 ++--- arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts | 5 ++--- arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts | 5 ++--- arch/arm/dts/zynqmp-zcu102-rev1.0.dts | 5 ++--- arch/arm/dts/zynqmp-zcu102-revA.dts | 5 ++--- arch/arm/dts/zynqmp-zcu102-revB.dts | 5 ++--- arch/arm/dts/zynqmp.dtsi | 6 +++++- 10 files changed, 22 insertions(+), 27 deletions(-)