From patchwork Thu Mar 31 18:24:59 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom de Vries X-Patchwork-Id: 89104 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id BE10FB6F7A for ; Fri, 1 Apr 2011 05:25:18 +1100 (EST) Received: (qmail 12093 invoked by alias); 31 Mar 2011 18:25:16 -0000 Received: (qmail 12080 invoked by uid 22791); 31 Mar 2011 18:25:15 -0000 X-SWARE-Spam-Status: No, hits=-1.5 required=5.0 tests=AWL, BAYES_00, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mail.codesourcery.com (HELO mail.codesourcery.com) (38.113.113.100) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 31 Mar 2011 18:25:11 +0000 Received: (qmail 595 invoked from network); 31 Mar 2011 18:25:11 -0000 Received: from unknown (HELO ?192.168.1.66?) (vries@127.0.0.2) by mail.codesourcery.com with ESMTPA; 31 Mar 2011 18:25:11 -0000 Message-ID: <4D94C6FB.1080309@codesourcery.com> Date: Thu, 31 Mar 2011 20:24:59 +0200 From: Tom de Vries User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.14) Gecko/20110223 Lightning/1.0b2 Thunderbird/3.1.8 MIME-Version: 1.0 To: gcc-patches@gcc.gnu.org, richard.earnshaw@arm.com CC: Maxim Kuvyrkov , Bernd Schmidt Subject: [PATCH, PR43920, 1/9] ARM specific part. References: <4D94C603.7080505@codesourcery.com> In-Reply-To: <4D94C603.7080505@codesourcery.com> Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org arm-size-branch_cost.patch reduces BRANCH_COST for thumb2 -Os to 1. The lower branch cost makes expand choose branches to expand code like '(a == b || c == d)'. The impact of arm-size-branch_cost.patch on the example from the bug report for ARM Thumb-2 -Os is a size reduction of 15%, from 68 to 58 bytes. This size reduction is illustrated in this diff of the assembly (left, without patch, size 68. right, with patch, size 58): ... push {r3, r4, r5, r6, r7, push {r3, r4, r5, r6, r7, mov r7, r1 mov r7, r1 mov r6, r2 mov r6, r2 movs r1, #0 movs r1, #0 movs r2, #1 movs r2, #1 mov r5, r0 mov r5, r0 bl lseek bl lseek movs r2, #2 < movs r1, #0 movs r1, #0 > movs r2, #2 mov r4, r0 mov r4, r0 mov r0, r5 mov r0, r5 bl lseek bl lseek sub r2, r4, #-1 | adds r2, r4, #1 rsbs r3, r2, #0 | beq .L3 adc r3, r3, r2 | adds r3, r0, #1 cmp r0, #-1 | beq .L2 it eq < orreq r3, r3, #1 < cbnz r3, .L3 < subs r0, r0, r4 subs r0, r0, r4 beq .L4 | beq .L5 str r4, [r7, #0] str r4, [r7, #0] str r0, [r6, #0] str r0, [r6, #0] mov r0, r3 | movs r0, #0 pop {r3, r4, r5, r6, r7, pop {r3, r4, r5, r6, r7, .L3: .L3: mov r0, #-1 | mov r0, r4 pop {r3, r4, r5, r6, r7, pop {r3, r4, r5, r6, r7, .L4: | .L5: mov r0, #-1 mov r0, #-1 > .L2: pop {r3, r4, r5, r6, r7, pop {r3, r4, r5, r6, r7, ... Thanks, - Tom Index: gcc/config/arm/arm.h =================================================================== --- gcc/config/arm/arm.h (revision 293961) +++ gcc/config/arm/arm.h (revision 293962) @@ -2201,7 +2201,8 @@ typedef struct /* Try to generate sequences that don't involve branches, we can then use conditional instructions */ #define BRANCH_COST(speed_p, predictable_p) \ - (TARGET_32BIT ? 4 : (optimize > 0 ? 2 : 0)) + (TARGET_32BIT ? (TARGET_THUMB2 && optimize_size ? 1 : 4) \ + : (optimize > 0 ? 2 : 0)) /* Position Independent Code. */ /* We decide which register to use based on the compilation options and