From patchwork Thu Mar 31 15:52:54 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lei Wen X-Patchwork-Id: 89090 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 5999BB6F06 for ; Fri, 1 Apr 2011 02:53:10 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A75F42808C; Thu, 31 Mar 2011 17:53:08 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 7l9SdSTpoGXS; Thu, 31 Mar 2011 17:53:08 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D3AA52808D; Thu, 31 Mar 2011 17:53:06 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A216E2808D for ; Thu, 31 Mar 2011 17:53:04 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id argSt26Mbe7X for ; Thu, 31 Mar 2011 17:53:03 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from dakia2.marvell.com (dakia2.marvell.com [65.219.4.35]) by theia.denx.de (Postfix) with ESMTPS id 06D0A2808C for ; Thu, 31 Mar 2011 17:53:01 +0200 (CEST) X-ASG-Debug-ID: 1301586779-082d000d0001-4l7tJC Received: from maili.marvell.com (maili.marvell.com [10.68.76.51]) by dakia2.marvell.com with ESMTP id OQkx8Ccig0XUFydB; Thu, 31 Mar 2011 08:52:59 -0700 (PDT) X-Barracuda-Envelope-From: leiwen@marvell.com Received: from localhost (unknown [10.38.12.123]) by maili.marvell.com (Postfix) with ESMTP id 8CCB18A426; Thu, 31 Mar 2011 08:52:58 -0700 (PDT) From: Lei Wen To: u-boot@lists.denx.de, adrian.wenl@gmail.com X-ASG-Orig-Subj: [PATCH] serial: ns16550: fix different reg size access Date: Thu, 31 Mar 2011 08:52:54 -0700 X-ASG-Orig-Subj: [PATCH] serial: ns16550: fix different reg size access Message-Id: <1301586774-25447-1-git-send-email-leiwen@marvell.com> X-Mailer: git-send-email 1.7.0.4 X-Barracuda-Connect: maili.marvell.com[10.68.76.51] X-Barracuda-Start-Time: 1301586779 X-Barracuda-URL: http://10.68.76.222:80/cgi-mod/mark.cgi X-Barracuda-Spam-Score: -1002.00 X-Barracuda-Spam-Status: No, SCORE=-1002.00 using global scores of TAG_LEVEL=1000.0 QUARANTINE_LEVEL=1000.0 KILL_LEVEL=1000.0 Subject: [U-Boot] [PATCH] serial: ns16550: fix different reg size access X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Some hardware would dysfunctional if only access the register by byte. This patch is tend to recover original access the responding register according to CONFIG_SYS_NS16550_REG_SIZE. Signed-off-by: Lei Wen --- README | 5 ++++ drivers/serial/ns16550.c | 7 ------ include/ns16550.h | 51 +++++++++++++++++++++++++++++++++++++-------- 3 files changed, 47 insertions(+), 16 deletions(-) diff --git a/README b/README index 21cd71b..45bc7dd 100644 --- a/README +++ b/README @@ -2660,6 +2660,11 @@ use the "saveenv" command to store a valid environment. space for already greatly restricted images, including but not limited to NAND_SPL configurations. +- CONFIG_SYS_NS16550_MAX_REG_SIZE: + Define the ns16550 max register size, + if the CONFIG_SYS_NS16550_REG_SIZE is smaller than this value, + use padding to fill those gap. + Low Level (hardware related) configuration options: --------------------------------------------------- diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 8eeb48f..4956c7f 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -16,13 +16,6 @@ #define UART_FCRVAL (UART_FCR_FIFO_EN | \ UART_FCR_RXSR | \ UART_FCR_TXSR) /* Clear & enable FIFOs */ -#ifdef CONFIG_SYS_NS16550_PORT_MAPPED -#define serial_out(x,y) outb(x,(ulong)y) -#define serial_in(y) inb((ulong)y) -#else -#define serial_out(x,y) writeb(x,y) -#define serial_in(y) readb(y) -#endif #ifndef CONFIG_SYS_NS16550_IER #define CONFIG_SYS_NS16550_IER 0x00 diff --git a/include/ns16550.h b/include/ns16550.h index 9ea81e9..a51b6e6 100644 --- a/include/ns16550.h +++ b/include/ns16550.h @@ -20,17 +20,50 @@ * Note that the following macro magic uses the fact that the compiler * will not allocate storage for arrays of size 0 */ - -#if !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE == 0) +#if (CONFIG_SYS_NS16550_REG_SIZE == 4) || (CONFIG_SYS_NS16550_REG_SIZE == -4) +#ifdef CONFIG_SYS_NS16550_PORT_MAPPED +#define serial_out(x, y) outl(x, y) +#define serial_in(y) inl(y) +#else +#define serial_out(x, y) writel(x, y) +#define serial_in(y) readl(y) +#endif +#define UART_REG_TYPE unsigned int +#elif (CONFIG_SYS_NS16550_REG_SIZE == 2) || (CONFIG_SYS_NS16550_REG_SIZE == -2) +#ifdef CONFIG_SYS_NS16550_PORT_MAPPED +#define serial_out(x, y) outw(x, y) +#define serial_in(y) inw(y) +#else +#define serial_out(x, y) writew(x, y) +#define serial_in(y) readw(y) +#endif +#define UART_REG_TYPE unsigned short +#elif (CONFIG_SYS_NS16550_REG_SIZE == 1) || (CONFIG_SYS_NS16550_REG_SIZE == -1) +#ifdef CONFIG_SYS_NS16550_PORT_MAPPED +#define serial_out(x, y) outb(x, y) +#define serial_in(y) inb(y) +#else +#define serial_out(x, y) writeb(x, y) +#define serial_in(y) readb(y) +#endif +#define UART_REG_TYPE unsigned char +#else #error "Please define NS16550 registers size." -#elif (CONFIG_SYS_NS16550_REG_SIZE > 0) -#define UART_REG(x) \ - unsigned char prepad_##x[CONFIG_SYS_NS16550_REG_SIZE - 1]; \ - unsigned char x; -#elif (CONFIG_SYS_NS16550_REG_SIZE < 0) +#endif + +#ifndef CONFIG_SYS_NS16550_MAX_REG_SIZE +#define CONFIG_SYS_NS16550_MAX_REG_SIZE 4 +#endif +#if (CONFIG_SYS_NS16550_REG_SIZE > 0) +#define UART_REG(x) \ + unsigned char prepad_##x[CONFIG_SYS_NS16550_MAX_REG_SIZE \ + - CONFIG_SYS_NS16550_REG_SIZE]; \ + UART_REG_TYPE x; +#else #define UART_REG(x) \ - unsigned char x; \ - unsigned char postpad_##x[-CONFIG_SYS_NS16550_REG_SIZE - 1]; + UART_REG_TYPE x; \ + unsigned char prepad_##x[CONFIG_SYS_NS16550_MAX_REG_SIZE \ + + CONFIG_SYS_NS16550_REG_SIZE]; #endif struct NS16550 {