diff mbox series

[U-Boot,4/5] arm64: a37xx: dts: enable pcie port

Message ID 1522051052-25211-5-git-send-email-make@marvell.com
State Accepted
Commit 9734104fe40e6abc0e6f3fb9ca8b34c69e5e5d7c
Delegated to: Stefan Roese
Headers show
Series *** SUBJECT HERE *** | expand

Commit Message

Ken Ma March 26, 2018, 7:57 a.m. UTC 
From: Wilson Ding <dingwei@marvell.com>

This patch enabled PCIe port on both devel-board
and espressobin board.

Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Wilson Ding <dingwei@marvell.com>
Signed-off-by: Ken Ma <make@marvell.com>
---
 arch/arm/dts/armada-3720-db.dts          |  8 ++++++++
 arch/arm/dts/armada-3720-espressobin.dts |  7 +++++++
 arch/arm/dts/armada-37xx.dtsi            | 16 ++++++++++++++++
 3 files changed, 31 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm/dts/armada-3720-db.dts b/arch/arm/dts/armada-3720-db.dts
index 52fc134..770c08a 100644
--- a/arch/arm/dts/armada-3720-db.dts
+++ b/arch/arm/dts/armada-3720-db.dts
@@ -154,3 +154,11 @@ 
 &usb3 {
 	status = "okay";
 };
+
+/* CON17 */
+&pcie0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie_pins>;
+	reset-gpio = <&gpiosb 3 GPIO_ACTIVE_HIGH>;
+	status = "okay";
+};
diff --git a/arch/arm/dts/armada-3720-espressobin.dts b/arch/arm/dts/armada-3720-espressobin.dts
index 4e70d88..7bfccb0 100644
--- a/arch/arm/dts/armada-3720-espressobin.dts
+++ b/arch/arm/dts/armada-3720-espressobin.dts
@@ -141,3 +141,10 @@ 
 &usb3 {
 	status = "okay";
 };
+
+&pcie0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie_pins>;
+	reset-gpio = <&gpiosb 3 GPIO_ACTIVE_HIGH>;
+	status = "okay";
+};
diff --git a/arch/arm/dts/armada-37xx.dtsi b/arch/arm/dts/armada-37xx.dtsi
index 9fc87c9..5400742 100644
--- a/arch/arm/dts/armada-37xx.dtsi
+++ b/arch/arm/dts/armada-37xx.dtsi
@@ -294,5 +294,21 @@ 
 				max-lanes = <2>;
 			};
 		};
+
+		pcie0: pcie@d0070000 {
+			compatible = "marvell,armada-37xx-pcie";
+			reg = <0 0xd0070000 0 0x20000>;
+			#address-cells = <3>;
+			#size-cells = <2>;
+			device_type = "pci";
+			num-lanes = <1>;
+			status = "disabled";
+
+			bus-range = <0 0xff>;
+			ranges = <0x82000000 0 0xe8000000
+				 0 0xe8000000 0 0x1000000 /* Port 0 MEM */
+				 0x81000000 0 0xe9000000
+				 0 0xe9000000 0 0x10000>; /* Port 0 IO*/
+		};
 	};
 };