From patchwork Wed Mar 30 17:55:38 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Berger X-Patchwork-Id: 88941 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id B6B43B6F12 for ; Thu, 31 Mar 2011 04:59:17 +1100 (EST) Received: from localhost ([127.0.0.1]:32919 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Q4zfE-0004Yd-Az for incoming@patchwork.ozlabs.org; Wed, 30 Mar 2011 13:58:40 -0400 Received: from [140.186.70.92] (port=60185 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Q4zck-000414-Ek for qemu-devel@nongnu.org; Wed, 30 Mar 2011 13:56:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Q4zcj-0008Hi-0G for qemu-devel@nongnu.org; Wed, 30 Mar 2011 13:56:06 -0400 Received: from e34.co.us.ibm.com ([32.97.110.152]:56188) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Q4zci-0008H3-O9 for qemu-devel@nongnu.org; Wed, 30 Mar 2011 13:56:04 -0400 Received: from d03relay03.boulder.ibm.com (d03relay03.boulder.ibm.com [9.17.195.228]) by e34.co.us.ibm.com (8.14.4/8.13.1) with ESMTP id p2UHi8aC010120 for ; Wed, 30 Mar 2011 11:44:08 -0600 Received: from d03av02.boulder.ibm.com (d03av02.boulder.ibm.com [9.17.195.168]) by d03relay03.boulder.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id p2UHu3Ss095880 for ; Wed, 30 Mar 2011 11:56:03 -0600 Received: from d03av02.boulder.ibm.com (loopback [127.0.0.1]) by d03av02.boulder.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id p2UHu1Hk031761 for ; Wed, 30 Mar 2011 11:56:02 -0600 Received: from localhost6.localdomain6 (d941e-10.watson.ibm.com [9.59.241.154]) by d03av02.boulder.ibm.com (8.14.4/8.13.1/NCO v10.0 AVin) with ESMTP id p2UHtxqY031647 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 30 Mar 2011 11:56:00 -0600 Received: from localhost6.localdomain6 (localhost.localdomain [127.0.0.1]) by localhost6.localdomain6 (8.14.4/8.14.3) with ESMTP id p2UHtx2D024826; Wed, 30 Mar 2011 13:55:59 -0400 Received: (from root@localhost) by localhost6.localdomain6 (8.14.4/8.14.4/Submit) id p2UHtx1N024825; Wed, 30 Mar 2011 13:55:59 -0400 Message-Id: <20110330175559.241899497@linux.vnet.ibm.com> User-Agent: quilt/0.48-1 Date: Wed, 30 Mar 2011 13:55:38 -0400 From: Stefan Berger To: stefanb@linux.vnet.ibm.com, seabios@seabios.org References: <20110330175534.302129463@linux.vnet.ibm.com> Content-Disposition: inline; filename=tcgbios_build.diff X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6, seldom 2.4 (older, 4) X-Received-From: 32.97.110.152 Cc: qemu-devel@nongnu.org Subject: [Qemu-devel] [PATCH V1 4/8] Build the TCG BIOS extensions and TPM drivers. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This patch allows to configure the TCGBIOS extensions to be built into SeaBIOS, depending on not COREBOOT being selected. All TCG BIOS extensions are activated with CONFIG_TCGBIOS. Add the two new code files (tcgbios.c, tpm_drivers.c) to be built. Signed-off-by: Stefan Berger --- Makefile | 2 +- src/Kconfig | 8 ++++++++ 2 files changed, 9 insertions(+), 1 deletion(-) Index: seabios/Makefile =================================================================== --- seabios.orig/Makefile +++ seabios/Makefile @@ -20,7 +20,7 @@ SRC16=$(SRCBOTH) system.c disk.c font.c SRC32FLAT=$(SRCBOTH) post.c shadow.c memmap.c coreboot.c boot.c \ acpi.c smm.c mptable.c smbios.c pciinit.c optionroms.c mtrr.c \ lzmadecode.c bootsplash.c jpeg.c usb-hub.c paravirt.c dev-i440fx.c \ - pci_region.c + pci_region.c tcgbios.c tpm_drivers.c SRC32SEG=util.c output.c pci.c pcibios.c apm.c stacks.c cc-option = $(shell if test -z "`$(1) $(2) -S -o /dev/null -xc \ Index: seabios/src/Kconfig =================================================================== --- seabios.orig/src/Kconfig +++ seabios/src/Kconfig @@ -314,6 +314,14 @@ menu "BIOS interfaces" default n help Disable A20 on 16bit boot. + + config TCGBIOS + depends on !COREBOOT + bool "TPM support and TCG BIOS extensions" + default y + help + Provide TPM support along with TCG BIOS extensions + endmenu menu "BIOS Tables"