@@ -26,6 +26,7 @@ CONFIG_MMC=y
CONFIG_DM_MMC=y
CONFIG_MMC_NDS32=y
CONFIG_FTSDC010=y
+CONFIG_FTSDC010_SDIO=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_CFI_FLASH=y
@@ -23,6 +23,7 @@ CONFIG_MMC=y
CONFIG_DM_MMC=y
CONFIG_MMC_NDS32=y
CONFIG_FTSDC010=y
+CONFIG_FTSDC010_SDIO=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_DM_ETH=y
CONFIG_FTMAC100=y
@@ -24,6 +24,7 @@ CONFIG_MMC=y
CONFIG_DM_MMC=y
CONFIG_MMC_NDS32=y
CONFIG_FTSDC010=y
+CONFIG_FTSDC010_SDIO=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
@@ -535,6 +535,13 @@ config FTSDC010
help
This SD/MMC controller is present in Andestech SoCs which is based on Faraday IP.
+config FTSDC010_SDIO
+ bool "Support ftsdc010 sdio"
+ default n
+ depends on FTSDC010
+ help
+ This can enable ftsdc010 sdio function.
+
endif
config TEGRA124_MMC_DISABLE_EXT_LOOPBACK
@@ -81,11 +81,6 @@
#define CONFIG_SYS_NS16550_CLK ((18432000 * 20) / 25) /* AG101P */
/*
- * SD (MMC) controller
- */
-#define CONFIG_FTSDC010_SDIO
-
-/*
* Miscellaneous configurable options
*/
@@ -83,11 +83,6 @@
#define CONFIG_SYS_NS16550_CLK ((18432000 * 20) / 25) /* AG101P */
/*
- * SD (MMC) controller
- */
-#define CONFIG_FTSDC010_SDIO
-
-/*
* Miscellaneous configurable options
*/
@@ -70,11 +70,6 @@
#endif
#define CONFIG_SYS_NS16550_CLK 19660800
-/*
- * SD (MMC) controller
- */
-#define CONFIG_FTSDC010_SDIO
-
/* Init Stack Pointer */
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000000 - \
GENERATED_GBL_DATA_SIZE)
@@ -741,7 +741,6 @@ CONFIG_FTPWM010_BASE
CONFIG_FTRTC010_BASE
CONFIG_FTRTC010_EXTCLK
CONFIG_FTRTC010_PCLK
-CONFIG_FTSDC010_SDIO
CONFIG_FTSDMC021
CONFIG_FTSDMC021_BASE
CONFIG_FTSMC020