From patchwork Fri Mar 16 16:20:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Leroy X-Patchwork-Id: 886980 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=c-s.fr Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 402rWv6lVJz9sBj for ; Sat, 17 Mar 2018 03:29:31 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 9E5E5C21DEC; Fri, 16 Mar 2018 16:23:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 0A3A7C21E53; Fri, 16 Mar 2018 16:21:38 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 961B2C21E2B; Fri, 16 Mar 2018 16:20:51 +0000 (UTC) Received: from pegase1.c-s.fr (pegase1.c-s.fr [93.17.236.30]) by lists.denx.de (Postfix) with ESMTPS id 6F39AC21E3E for ; Fri, 16 Mar 2018 16:20:48 +0000 (UTC) Received: from localhost (mailhub1-int [192.168.12.234]) by localhost (Postfix) with ESMTP id 402rKh0pRgz9tvlw; Fri, 16 Mar 2018 17:20:40 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at c-s.fr Received: from pegase1.c-s.fr ([192.168.12.234]) by localhost (pegase1.c-s.fr [192.168.12.234]) (amavisd-new, port 10024) with ESMTP id D7GqRWCfjife; Fri, 16 Mar 2018 17:20:40 +0100 (CET) Received: from messagerie.si.c-s.fr (messagerie.si.c-s.fr [192.168.25.192]) by pegase1.c-s.fr (Postfix) with ESMTP id 402rKh0Fd2z9tvls; Fri, 16 Mar 2018 17:20:40 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by messagerie.si.c-s.fr (Postfix) with ESMTP id 0EB248BBB1; Fri, 16 Mar 2018 17:20:48 +0100 (CET) X-Virus-Scanned: amavisd-new at c-s.fr Received: from messagerie.si.c-s.fr ([127.0.0.1]) by localhost (messagerie.si.c-s.fr [127.0.0.1]) (amavisd-new, port 10023) with ESMTP id 3RVxE9PqtW0M; Fri, 16 Mar 2018 17:20:48 +0100 (CET) Received: from po15720vm.idsi0.si.c-s.fr (po15451.idsi0.si.c-s.fr [172.25.231.30]) by messagerie.si.c-s.fr (Postfix) with ESMTP id BA72E8BBAA; Fri, 16 Mar 2018 17:20:47 +0100 (CET) Received: by po15720vm.idsi0.si.c-s.fr (Postfix, from userid 0) id 984ED6F128; Fri, 16 Mar 2018 17:20:47 +0100 (CET) Message-Id: In-Reply-To: References: From: Christophe Leroy To: Tom Rini , Wolfgang Denk Date: Fri, 16 Mar 2018 17:20:47 +0100 (CET) Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH v4 09/16] powerpc: mpc8xx: initialisation of initial RAM X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" u-boot requires some RAM at startup, to store global data structure. RAM is also needed when we migrate to DM for some initial malloc This patch implements the proper init of that RAM by calling board_init_f_alloc_reserve() and board_init_f_init_reserve() Signed-off-by: Christophe Leroy --- arch/powerpc/cpu/mpc8xx/start.S | 27 ++++++++++++++++++++------- 1 file changed, 20 insertions(+), 7 deletions(-) diff --git a/arch/powerpc/cpu/mpc8xx/start.S b/arch/powerpc/cpu/mpc8xx/start.S index 202ea81ae49..62ac80b03b9 100644 --- a/arch/powerpc/cpu/mpc8xx/start.S +++ b/arch/powerpc/cpu/mpc8xx/start.S @@ -130,12 +130,6 @@ in_flash: /* initialize some SPRs that are hard to access from C */ /*----------------------------------------------------------------------*/ - lis r3, CONFIG_SYS_IMMR@h /* pass IMMR as arg1 to C routine */ - ori r1, r3, CONFIG_SYS_INIT_SP_OFFSET /* set up the stack in internal DPRAM */ - /* Note: R0 is still 0 here */ - stwu r0, -4(r1) /* clear final stack frame so that */ - stwu r0, -4(r1) /* stack backtraces terminate cleanly */ - /* * Disable serialized ifetch and show cycles * (i.e. set processor to normal mode). @@ -151,6 +145,25 @@ in_flash: ori r2, r2, CONFIG_SYS_DER@l mtspr DER, r2 + /* set up the stack in internal DPRAM */ + lis r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@h + ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@l + addi r1, r3, -8 + + bl board_init_f_alloc_reserve + addi r1, r3, -8 + + /* Zeroise the CPM dpram */ + lis r4, CONFIG_SYS_IMMR@h + ori r4, r4, (0x2000 - 4) + li r0, (0x2000 / 4) + mtctr r0 + li r0, 0 +1: stwu r0, 4(r4) + bdnz 1b + + bl board_init_f_init_reserve + /* let the C-code set up the rest */ /* */ /* Be careful to keep code relocatable ! */ @@ -158,7 +171,7 @@ in_flash: GET_GOT /* initialize GOT access */ - /* r3: IMMR */ + lis r3, CONFIG_SYS_IMMR@h bl cpu_init_f /* run low-level CPU init code (from Flash) */ bl board_init_f /* run 1st part of board init code (from Flash) */