diff mbox series

[U-Boot,v4,09/16] powerpc: mpc8xx: initialisation of initial RAM

Message ID b16d32932af876a6bcf83718a34741325ced826a.1521215903.git.christophe.leroy@c-s.fr
State Accepted
Commit 872807b1e57aa0f376d8fd35ea548a8befa8945b
Delegated to: Tom Rini
Headers show
Series Powerpc: mpc8xx: cleanup before migration to DM model | expand

Commit Message

Christophe Leroy March 16, 2018, 4:20 p.m. UTC
u-boot requires some RAM at startup, to store global data structure.
RAM is also needed when we migrate to DM for some initial malloc

This patch implements the proper init of that RAM by calling
board_init_f_alloc_reserve() and board_init_f_init_reserve()

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
 arch/powerpc/cpu/mpc8xx/start.S | 27 ++++++++++++++++++++-------
 1 file changed, 20 insertions(+), 7 deletions(-)

Comments

Tom Rini April 6, 2018, 9:03 p.m. UTC | #1
On Fri, Mar 16, 2018 at 05:20:47PM +0100, Christophe Leroy wrote:

> u-boot requires some RAM at startup, to store global data structure.
> RAM is also needed when we migrate to DM for some initial malloc
> 
> This patch implements the proper init of that RAM by calling
> board_init_f_alloc_reserve() and board_init_f_init_reserve()
> 
> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>

Applied to u-boot/master, thanks!
diff mbox series

Patch

diff --git a/arch/powerpc/cpu/mpc8xx/start.S b/arch/powerpc/cpu/mpc8xx/start.S
index 202ea81ae49..62ac80b03b9 100644
--- a/arch/powerpc/cpu/mpc8xx/start.S
+++ b/arch/powerpc/cpu/mpc8xx/start.S
@@ -130,12 +130,6 @@  in_flash:
 	/* initialize some SPRs that are hard to access from C			*/
 	/*----------------------------------------------------------------------*/
 
-	lis	r3, CONFIG_SYS_IMMR@h		/* pass IMMR as arg1 to C routine */
-	ori	r1, r3, CONFIG_SYS_INIT_SP_OFFSET /* set up the stack in internal DPRAM */
-	/* Note: R0 is still 0 here */
-	stwu	r0, -4(r1)		/* clear final stack frame so that	*/
-	stwu	r0, -4(r1)		/* stack backtraces terminate cleanly	*/
-
 	/*
 	 * Disable serialized ifetch and show cycles
 	 * (i.e. set processor to normal mode).
@@ -151,6 +145,25 @@  in_flash:
 	ori	r2, r2, CONFIG_SYS_DER@l
 	mtspr	DER, r2
 
+	/* set up the stack in internal DPRAM */
+	lis	r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@h
+	ori	r3, r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@l
+	addi	r1, r3, -8
+
+	bl	board_init_f_alloc_reserve
+	addi	r1, r3, -8
+
+	/* Zeroise the CPM dpram */
+	lis	r4, CONFIG_SYS_IMMR@h
+	ori	r4, r4, (0x2000 - 4)
+	li	r0, (0x2000 / 4)
+	mtctr	r0
+	li	r0, 0
+1:	stwu	r0, 4(r4)
+	bdnz	1b
+
+	bl	board_init_f_init_reserve
+
 	/* let the C-code set up the rest					*/
 	/*									*/
 	/* Be careful to keep code relocatable !				*/
@@ -158,7 +171,7 @@  in_flash:
 
 	GET_GOT			/* initialize GOT access			*/
 
-	/* r3: IMMR */
+	lis	r3, CONFIG_SYS_IMMR@h
 	bl	cpu_init_f	/* run low-level CPU init code     (from Flash)	*/
 
 	bl	board_init_f	/* run 1st part of board init code (from Flash) */